FinFET to GAA MBCFET: A Review and Insights

RR Das, TR Rajalekshmi, A James - IEEE Access, 2024 - ieeexplore.ieee.org
This review article presents a journey from Fin-shaped field effect transistor (FinFET) to gate-
all-around multi-bridge channel field effect transistor (GAA MBCFET) technology, unraveling …

Towards Intelligent Monitoring in IoT: AI Applications for Real-Time Analysis and Prediction

W Villegas-Ch, J García-Ortiz, S Sánchez-Viteri - IEEE Access, 2024 - ieeexplore.ieee.org
In the contemporary era, the intersection of the Internet of Things and artificial intelligence
revolutionizes how industries monitor and optimize their operations. In this work, we present …

A novel low-energy half-select-free 9T SRAM cell based on CNTFETs with enhanced write performance

SHH Nemati, N Eslami, MH Moaiyeri - AEU-International Journal of …, 2024 - Elsevier
This work proposes a novel 9 T SRAM cell based on carbon nanotube field-effect transistors
(CNTFETs). The design features an innovative writing technique, leveraging a floating …

A Reconfigurable Non-Volatile Memory Architecture for Prolonged Wearable Health Monitoring Devices

MA Gargari, N Eslami… - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
Wearable devices have broadened the horizons of healthcare systems within consumer
digital products. However, these devices have limited power resources, emphasizing the …

A Dual-Wordline 6T SRAM Computing-In-Memory Macro Featuring Full Signed Multi-bit Computation for Lightweight Networks

Z Gu, S Dou, H You, Y Zhan, S Qiao, Y Zhou - IEEE Access, 2024 - ieeexplore.ieee.org
In this paper, we present an analog-mixed-signal 6T SRAM computing-in-memory (CIM)
macro. The macro uses dual-wordline 6T bitcells to reduce power consumption and write …

FinFET Technology based Low Power SRAM Cell Design for Embedded Memory

JV Suman, M Hema, AS Priya… - International …, 2024 - atlantis-press.com
Computer systems rely heavily on cache memory because it offers a quicker and more
effective means of accessing frequently used data. It serves as a buffer between the CPU …

Relaxing Sensing Margins in Double-Barrier Magnetic Tunnel Junction for Energy-Efficient Smart Material Implication (SIMPLY) Scheme Operating at 77K

T Moposita, E Holguín - 2024 IEEE Eighth Ecuador Technical …, 2024 - ieeexplore.ieee.org
This paper explores the impact on reliability and energy-efficiency in double-barrier
magnetic tunnel junctions (DMTJs)-based smart material implication (SIMPLY) scheme …

An Energy-Efficient Readout Method Based on Weight-Flip-Store Coding and Quantization Cycle Skipping Technology for Computing in Memory

S Dou, H You, Y Zhan, S Qiao, Y Zhou - IEICE Electronics Express, 2024 - jstage.jst.go.jp
Analog computing-in-memory (ACIM) is one promising solution to address the memory
bottleneck existing in traditional computing architectures. However, inefficient analog-to …

[PDF][PDF] Design of High-Speed Low-power SRAM Cell using FinFET in the Stack Method for Medical Applications

M Sharma, SS Gill, K Sharma, B Krishna - WSEAS Transactions on …, 2025 - wseas.com
This research presents a high-speed, low-power Static Random-Access Memory (SRAM)
cell design utilizing the Stack Method, tailored specifically for medical applications. The …

6T-8T Hybrid SRAM for Lower-Power Neural-Network Processing by Lowering Operating Voltage

J Wu, R Yu, K Namba - IEICE TRANSACTIONS on Information and …, 2024 - search.ieice.org
This letter introduces an innovation for the heterogeneous storage architecture of AI chips,
specifically focusing on the integration of six transistors (6T) and eight transistors (8T) hybrid …