Preesm: A dataflow-based rapid prototyping framework for simplifying multicore dsp programming
The high performance Digital Signal Processors (DSPs) currently manufactured by Texas
Instruments are heterogeneous multiprocessor architectures. Programming these …
Instruments are heterogeneous multiprocessor architectures. Programming these …
FPGA-based soft-core processors for image processing applications
With security and surveillance, there is an increasing need to process image data efficiently
and effectively either at source or in a large data network. Whilst a Field-Programmable Gate …
and effectively either at source or in a large data network. Whilst a Field-Programmable Gate …
Power-awarness in coarse-grained reconfigurable multi-functional architectures: a dataflow based strategy
Modern embedded systems, to accommodate different applications or functionalities over
the same substrate and provide flexibility at the hardware level, are often resource …
the same substrate and provide flexibility at the hardware level, are often resource …
Reconfigurable coprocessors synthesis in the MPEG-RVC domain
Flexibility and high efficiency are common design drivers in the embedded systems domain.
Coarse-grained reconfigurable coprocessors can tackle these issues, but they suffer of …
Coarse-grained reconfigurable coprocessors can tackle these issues, but they suffer of …
Papify: Automatic instrumentation and monitoring of dynamic dataflow applications based on papi
The widening of the complexity-productivity gap in application development witnessed in the
last years is becoming an important issue for the developers. New design methods try to …
last years is becoming an important issue for the developers. New design methods try to …
Partitioning and optimization of high level stream applications for multi clock domain architectures
In this paper we propose a design methodology to partition dataflow applications on a multi
clock domain architecture. This work shows how starting from a high level dataflow …
clock domain architecture. This work shows how starting from a high level dataflow …
Synthesis and optimization of high-level stream programs
In this paper we address the problem of translating high-level stream programs, such as
those written in MPEG's RVC-CAL dataflow language, into implementations in …
those written in MPEG's RVC-CAL dataflow language, into implementations in …
Methodologies for synthesizing and analyzing dynamic dataflow programs in heterogeneous systems for edge computing
A Bloch, S Casale-Brunet… - IEEE Open Journal of …, 2021 - ieeexplore.ieee.org
The possibility of using the increasing computing power available in cloud infrastructures
requires the development of new approaches for application software development and …
requires the development of new approaches for application software development and …
Why comparing system-level MPSoC mapping approaches is difficult: a case study
Software abstractions are crucial to effectively program heterogeneous Multi-Processor
Systems on Chip (MPSoCs). Prime examples of such abstractions are Kahn Process …
Systems on Chip (MPSoCs). Prime examples of such abstractions are Kahn Process …
The Multi-Dataflow Composer tool: An open-source tool suite for optimized coarse-grain reconfigurable hardware accelerators and platform design
Modern embedded and cyber-physical systems require every day more performance, power
efficiency and flexibility, to execute several profiles and functionalities targeting the ever …
efficiency and flexibility, to execute several profiles and functionalities targeting the ever …