Over the past decade, system-on-chip (SoC) designs have evolved to address the ever
increasing complexity of applications, fueled by the era of digital convergence …

Streamlined Design Solutions Specifically for NoCTo solve critical network-on-chip (NoC)
architecture and design problems related to structure, performance and modularity …

In this work, we propose a SoC power estimation framework built on our system-level
simulation environment. Our framework provides designers with the system-level power …

Majority of existing works on system level power estimation have focused on the processor,
while there are very few that address power consumption of peripherals in a SoC. With the …

For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-
level on-chip communication architecture is emerging as a significant source of power …

As adoption of system-level hardware design is increasing in industry and academia,
accurate power estimation at this level is becoming important. In this paper, we present a …

Motivated by the importance of energy consumption in mobile electronics this work
describes a methodology developed at ARM for power modeling and energy estimation in …

Many techniques and tools exist to estimate the power consumption and the temperature
map of a chip. These tools help the hardware designers develop power efficient chips in the …

We can integrate more IP blocks on the same silicon die as the development of fabrication
technologies and EDA tools. Consequently, we can design complicated SoC architecture …

Multi-core architectures are increasingly being used in real-time embedded systems. In
general, such systems have more processors than the shared memory modules, potentially …