Single event transients in digital CMOS—A review

V Ferlet-Cavrois, LW Massengill… - IEEE Transactions on …, 2013 - ieeexplore.ieee.org
The creation of soft errors due to the propagation of single event transients (SETs) is a
significant reliability challenge in modern CMOS logic. SET concerns continue to be …

Single event soft error in advanced integrated circuit

Y Zhao, S Yue, X Zhao, S Lu, Q Bian… - Journal of …, 2015 - iopscience.iop.org
As technology feature size decreases, single event upset (SEU), and single event transient
(SET) dominate the radiation response of microcircuits. Multiple bit upset (MBU)(or multi cell …

A physics-based single event transient pulse width model for CMOS VLSI circuits

YM Aneesh, B Bindu - IEEE Transactions on Device and …, 2020 - ieeexplore.ieee.org
The single-event transients in MOSFETs due to heavy ion strikes introduce soft errors in sub-
50 nm CMOS VLSI circuits. These transients are easily captured and propagated in high …

Single-event transient measurements in nMOS and pMOS transistors in a 65-nm bulk CMOS technology at elevated temperatures

MJ Gadlage, JR Ahlbin, B Narasimham… - … on Device and …, 2010 - ieeexplore.ieee.org
In this paper, heavy-ion-induced single-event transient (SET) pulsewidths measured in a 65-
nm bulk CMOS technology at temperatures ranging from 25° C to 100° C with an …

New techniques for SET sensitivity and propagation measurement in flash-based FPGAs

A Evans, D Alexandrescu… - … on Nuclear Science, 2014 - ieeexplore.ieee.org
Single-event transients (SETs) remain a concern in field-programmable gate arrays (FPGAs)
used for space applications. However, accurate measurement of SETs in FPGAs is …

Supply voltage and temperature dependence of single-event transient in 28-nm FDSOI MOSFETs

J Xu, Y Guo, R Song, B Liang, Y Chi - Symmetry, 2019 - mdpi.com
Based on three-dimensional (3D) technology computer aided design (TCAD) simulations,
the supply voltage and temperature dependence of single-event transient (SET) pulse width …

Increased single-event transient pulsewidths in a 90-nm bulk CMOS technology operating at elevated temperatures

MJ Gadlage, JR Ahlbin, B Narasimham… - … on Device and …, 2009 - ieeexplore.ieee.org
Combinational-logic soft errors are expected to be the dominant reliability issue for
advanced technologies. One of the major factors affecting the soft-error rates is single-event …

Effects of temperature and supply voltage on SEU-and SET-induced errors in bulk 40-nm sequential circuits

RM Chen, ZJ Diggins, NN Mahatme… - … on Nuclear Science, 2017 - ieeexplore.ieee.org
The single-event sensitivity of bulk 40-nm sequential circuits is investigated as a function of
temperature and supply voltage. An overall increase in SEU cross section versus …

An investigation of single event transient response in 45-nm and 32-nm SOI RF-CMOS devices and circuits

TD England, R Arora, ZE Fleetwood… - … on Nuclear Science, 2013 - ieeexplore.ieee.org
This paper uses charge deposition by two-photon absorption to present the first investigation
of the physical mechanisms underlying the single event transient (SET) response of cascode …

TCAD simulation of single event transient in Si bulk MOSFET at cryogenic temperature

T Lu, C Wang - IEEE Access, 2022 - ieeexplore.ieee.org
In this paper, the functional relationship between temperature and single event transient
currents caused by heavy-ion striking using TCAD simulation is investigated from 77K to 300 …