This paper describes a new approach to the automatic calibration of modulated phase-
locked loop (PLL) frequency synthesizers. The new calibration approach tunes the response …

A novel BiCMOS full-swing circuit technique with superior performance over CMOS down to
1.5 V is proposed. A conventional noncomplementary BiCMOS process is used. The …

A new generation of noncomplementary BiCMOS digital gates for low-voltage, low-power
applications is presented. These include an inverter and a NAND gate. A bootstrapping …

A new generation of complementary BiCMOS digital gates for low-voltage environments will
be presented. These include inverters and an AND gate. These circuits are particularly …

A new BiCMOS buffer circuit and its NAND logic gate implementation for low-voltage
environments are presented. The circuit, based on a standard BiCMOS process, employs a …

The focus of this research has been the development of a low power, radio frequency
transmitter architecture. Specifically, a technique for in service automatic calibration of a …

In complementary metal–oxide–semiconductor (CMOS) high-speed buffer design, leakage
power dissipation, complex routing area, and low-power consumption are the most common …

An overview of the optimization of buffer chains and multilevel logic in a BiCMOS
environment, including scaling effects, is presented. The BiCMOS speed-up contours are …

Several BiCMOS drivers have been developed throughout the years. Figure 6.1 shows
some examples of these circuits. They can be divided into two categories: partial swing …

A detailed methodology to perform the transient analysis of digital BiCMOS circuits is
presented. The analysis takes into account high level injection effects, the capacitances at …