Design and analysis of radiation hardened 10 T SRAM cell for space and terrestrial applications
Soft errors are the primary concern in space and terrestrial integrated circuit applications.
When a charged particle from space collides with a scaled memory circuit, a transient pulse …
When a charged particle from space collides with a scaled memory circuit, a transient pulse …
A single-ended low leakage and low voltage 10T SRAM cell with high yield
This paper presents a low leakage power 10T single-ended SRAM cell in the sub-threshold
region that improves read, write, and hold stability. While at low voltages, the write-ability is …
region that improves read, write, and hold stability. While at low voltages, the write-ability is …
Half‐selection disturbance free 8T low leakage SRAM cell
This work presents a robust and low leakage new 8T static random access memory (SRAM)
cell without any half‐selection disturbance. The proposed cell removes write disturbance by …
cell without any half‐selection disturbance. The proposed cell removes write disturbance by …
Design of novel SRAM cell using hybrid VLSI techniques for low leakage and high speed in embedded memories
K Gavaskar, US Ragupathy, V Malini - Wireless Personal Communications, 2019 - Springer
Static or leakage power is the dominating component of total power dissipation in deep
nanometer technologies below 90 nm, which has resulted in increase from 18% at 130 nm …
nanometer technologies below 90 nm, which has resulted in increase from 18% at 130 nm …
A low power single bit-line configuration dependent 7T SRAM bit cell with process-variation-tolerant enhanced read performance
Cache memory is a key component for most microprocessors in embedded system. The
increasing processing load has resulted in an upsurge in the demand for low power, high …
increasing processing load has resulted in an upsurge in the demand for low power, high …
Design of Enhanced Reversible 9T SRAM Design for the Reduction in Sub-threshold Leakage Current with14nm FinFET Technology
P Praveen, RK Singh - ACM Transactions on Design Automation of …, 2023 - dl.acm.org
Power dissipation is considered one of the important issues in low power Very-large-scale
integration (VLSI) circuit design and is related to the threshold voltage. Generally, the sub …
integration (VLSI) circuit design and is related to the threshold voltage. Generally, the sub …
Design and comparative analysis of SRAM array using low leakage controlled transistor technique with improved delay
K Gavaskar, MS Narayanan, MS Nachammal… - Journal of Ambient …, 2022 - Springer
Static random access memory power and speed dissipation are the significant factor in most
of the electronic applications, which prompts numerous plans with the power utilization of …
of the electronic applications, which prompts numerous plans with the power utilization of …
Analytical modelling and design of 9T SRAM cell with leakage control technique
This paper presents a novel 9T static random access memory (SRAM) cell consisting of a
single ended isolated read bit line with 2T read port for improving stability and a tail …
single ended isolated read bit line with 2T read port for improving stability and a tail …
Schmitter trigger-based single-ended stable 7T SRAM cell
In this paper, a schmitt trigger-based single-sided 7T stable SRAM is proposed for ultra-low
energy and near-threshold operation, which supports a bit interleaving scheme. The …
energy and near-threshold operation, which supports a bit interleaving scheme. The …
Low power 8t sram with high stability and bit interleaving capability
R Lorenzo, DL Pradeep… - 2022 2nd International …, 2022 - ieeexplore.ieee.org
A new 8T Static Random-Access Memory (SRAM) presented in this paper. This paper
addresses the issue related to power, delay and bit interleaving (column selection). The …
addresses the issue related to power, delay and bit interleaving (column selection). The …