Demand for low-power data processing hardware continues to rise inexorably. Existing
programmable and" general purpose" solutions (eg. SIMD, GPGPUs) are insufficient, as …

The Single Instruction Multiple Data (SIMD) architecture, supported by various high-
performance computing platforms, efficiently utilizes data-level parallelism. The SIMD model …

The massive parallel architecture enables graphics processing units (GPUs) to boost
performance for a wide range of applications. Initially, GPUs only employ scratchpad …

Recent programmable accelerators are faster and more energy efficient than general
purpose processors, but expose complex hardware/software abstractions for compilers. A …

General purpose processors (GPPs), from small inorder designs to many-issue out-of-order,
incur large power overheads which must be addressed for future technology generations …

Because of severe limitations in technology scaling, architects have innovated in
specializing general purpose processors for computation primitives (eg vector instructions …

To improve the performance of Graphics Processing Units (GPUs) beyond simply increasing
core count, architects are recently adopting a scale-up approach: the peak throughput and …

The end of Dennard Scaling has forced architects to focus on designing for execution
efficiency. Course-grained reconfigurable architectures (CGRAs) are a class of architectures …

Single-ISA heterogeneous multi-core architectures offer a compelling high-performance and
high-efficiency solution to executing task-parallel workloads in mobile systems on chip …

Modern microprocessors exploit data level parallelism through in-core data-parallel
accelerators in the form of short vector ISA extentions such as SSE/AVX and NEON …