We introduce a new design style called extended burst-mode. The extended burst-mode
design style covers a wide spectrum of sequential circuits ranging from delay-insensitive to …

The purpose of this monograph is to provide both an introduction to eld of asynchronous
digital circuit design and an overview of the practical state of the art in 1997. In the early …

Minimalist is a new extensible environment for the synthesis and verification of burst-mode
asynchronous finite-state machines. Minimalist embodies a complete technology …

This paper describes the design and verification of a high-performance asynchronous
differential equation solver benchmark circuit. The design has low-control-overhead which …

Object access distribution in the Web is governed by Zipf's law, in general. This property
leads to effective Web caches, which store the most popular objects and typically employ the …

Asynchronous, or unclocked, digital systems have several potential advantages over their
synchronous counterparts. In particular, they address a number of challenging problems …

This paper presents a compiler from a standard Hardware Description Language (Verilog
HDL) to an asynchronous Control Unit and a synchronous Data Path. The Control Unit …

We introduce a new design style called extended burst-mode. The extended burst-mode
design style covers a wide spectrum of sequential circuits ranging from delay-insensitive to …

This thesis proposes process spaces. a simple and unified treatment for concurrency issues
such as parallel composition. refinement. deadlock. livelock. and starvation. Processes are …

Modern high-performance asynchronous circuits depend on timing constraints for correct
operation, so timing analyzers are essential asynchronous design tools. In this paper we …