A memory device may comprise a magnetic tunnel junction (MTJ) stack, a bottom electrode
(BE) layer, and a contact layer. The MTJ stack may include a free layer, a barrier, and a …

In a particular illustrative embodiment, a method of fabricating a semiconductor device is
disclosed that includes forming a metal layer over a device substrate, forming a via in …

Some embodiments relate to a magnetoresistive random access memory (MRAM) cell. The
cell includes a bottom electrode having a central bottom electrode portion Sur rounded by a …

BACKGROUND Example embodiments of the inventive concepts relate to memory devices
and/or methods of fabricating the same, and in particular, to memory devices including a …

A first lower interconnection structure and a second lower interconnection structure are
formed using a first design rule on a first region of a substrate and a second region of the …

A memory device may comprise a magnetic tunnel junction (MTJ) stack, a bottom electrode
(BE) layer, and a contact layer. The MTJ stack may include a free layer, a barrier, and a …

Back end of line (BEOL) metallization structures and methods according to aspects of the
invention generally include forming an interconnect structure including a recessed via …

Integrated circuit devices may include a substrate including a flash memory region and a
variable resistance memory region, a flash memory cell transistor including a cell gate …

A bottom pinned perpendicular magnetic tunnel junction (pMTJ) with high TMR which can
withstand high temperature back-end-of-line (BEOL) processing is disclosed. The pMTJ …

BACKGROUND Non-volatile memories are used in a wide variety of commercial and military
electronic devices and equipment. Embedded flash memory devices are used to store data …