Direct time-of-flight (d-ToF) estimation with high frame rate requires the incorporation of a
time-to-digital converter (TDC) at pixel level. A feasible approach to a compact …

摘要基于0. 18 μm BCD 工艺实现了一种高灵敏度, 低暗计数噪声的近红外单光子直接飞行时间(
dTOF) 探测器. 集成的单光子雪崩二极管(SPAD) 探测器件采用新型的高压p 阱/n+ …

This paper presents the design of a 9-bit, Two-Step Time-to-Digital Converter (TDC) in 65
nm CMOS for the application in a time-mode ADC. The proposed TDC uses body-biasing in …

This work proposes a three-step multi-resolution time-to-digital converter (TDC) architecture
based on the vernier delay line (VDL). The proposed architecture uses a delay-locked loop …

This paper presents the design of a wideband, low-jitter 5 GHz digital phase-locked loop
(DPLL) in 65 nm CMOS. The DPLL uses a high-resolution, low-power two-step time-to …

This brief presents a logarithmic analog-to-digital converter architecture with selectable
transfer characteristic. A delay-matched regeneration detection circuit and the transfer …

Traditional methods of analogue-digital conversion quantise data in the voltage domain.
Device scaling makes it harder to resolve signals in the voltage domain with reasonable …

The time-correlated single-photon counting (TCSPC) technology is a vital, advanced
measurement and analytical tool for time-resolved biomedical, physics research and many …

The authors present a time-to-digital converter based on multi-stage amplification structure.
This structure consists of coarse stage and fine stage. Coarse stage utilizes delay line to get …