[HTML][HTML] Time-to-digital conversion techniques: A survey of recent developments

J Szyduczyński, D Kościelnik, M Miśkowicz - Measurement, 2023 - Elsevier
Time-to-digital converters (TDCs) are key components of time-mode circuits and enablers for
digital processing of analog signals encoded in time. Since design of time-mode circuits …

An improved intelligent driver model considering the information of multiple front and rear vehicles

F Zong, M Wang, M Tang, X Li, M Zeng - IEEE Access, 2021 - ieeexplore.ieee.org
This paper proposes an improved intelligent driver model (IDM) by considering the
information of multiple front and rear vehicles to describe the car-following behaviour of …

A low-power multichannel time-to-digital converter using all-digital nested delay-locked loops with 50-ps resolution and high throughput for LiDAR sensors

A Hejazi, SJ Oh, MRU Rehman, RE Rad… - IEEE Transactions …, 2020 - ieeexplore.ieee.org
This article presents a low-power, all-digital multichannel time-to-digital converter (TDC) for
light detection and ranging (LiDAR) sensors. The proposed TDC architecture measures the …

An 8.5 ps resolution, cyclic Vernier TDC using a stage-gated ring oscillator and DWA-based dynamic element matching in 28 nm CMOS

VN Nguyen, XT Pham, JW Lee - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
Herein, we present a cyclic Vernier time-to-digital converter (TDC) using a stage-gated ring
oscillator (SGRO) and data-weighted averaging (DWA) dynamic element matching (DEM) …

Peak Detector With an FPGA-Only Solution for Multichannel Ultrafast Signals

C Cai, F Wang, Q Xie, J Luo - IEEE Transactions on Industrial …, 2023 - ieeexplore.ieee.org
Peak detection is useful in a wide range of applications. To achieve this task, conventional
approaches [including dedicated application specific integrated circuit-based designs] often …

Three-step cyclic Vernier TDC using a pulse-shrinking inverter-assisted residue quantizer for low-complexity resolution enhancement

VN Nguyen, XT Pham, JW Lee - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
Herein, we present a cyclic Vernier time-to-digital converter (TDC) using a pulse-shrinking
inverter-assisted residue quantizer (IRQ). Previous pulse-shrinking techniques suffer from a …

High-precision time interval measurement method based on sliding scaled time-to-digital conversion circuit

J Wu, R Zhong, Y Sui, Y Zhao, C Wan… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
This article employs the method of sliding scaled technique (SST) and average method to
significantly improve the time interval measurement accuracy. For a multi-segment time-to …

A 4.7-ps resolution recirculating cyclic Vernier TDC using DWA-based mismatch correction and a register-based time amplifier

VN Nguyen, JW Lee - IEEE Transactions on Instrumentation …, 2023 - ieeexplore.ieee.org
Herein, we present a recirculating (RC) cyclic Vernier time-to-digital converter (TDC) using
dynamic element matching and a register-based time amplifier (TA). The RC TDC reuses a …

[HTML][HTML] Novel machine learning-driven optimizing decoding solutions for FPGA-based time-to-digital converters

F Garzetti, N Lusardi, E Ronconi, A Costa, A Geraci - Measurement, 2024 - Elsevier
Calibration of models and data structures is recurring in a large number of cross-cutting
applications from finance to engineering. Even though there are numerous and well …

TwinPop: A Resource-efficient and Highly Linear FPGA-based Time-to-Digital Converter

F Wang, Z Weng, C Cai, M Hu, Q Xie… - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
The field programmable gate array (FPGA)-based time-to-digital converter (TDC) has been
notoriously troubled by its nonlinearity problems. To address it, conventional approaches …