Microelectronic assemblies
B Haba - US Patent 11,462,419, 2022 - Google Patents
Various embodiments of fanout packages are disclosed. A method of forming a
microelectronic assembly is disclosed. The method can include bonding a first surface of at …
microelectronic assembly is disclosed. The method can include bonding a first surface of at …
Multi-chip modules formed using wafer-level processing of a reconstituted wafer
L Wang, R Katkar - US Patent 11,387,214, 2022 - Google Patents
Apparatuses and methods are described. This apparatus includes a bridge die having first
contacts on a die surface being in a molding layer of a reconstituted wafer. The reconstituted …
contacts on a die surface being in a molding layer of a reconstituted wafer. The reconstituted …
Semiconductor device
K Nakagawa, K Terajima, K Tsuchiya, Y Sato… - US Patent …, 2019 - Google Patents
According to an embodiment of the present invention, there is provided a semiconductor
device having a first semicon ductor component and a second semiconductor component …
device having a first semicon ductor component and a second semiconductor component …
Semiconductor package structure and manufacturing method thereof
JY Wu, CH Yu, CS Liu, CH Lee - US Patent 10,461,022, 2019 - Google Patents
(57) ABSTRACT A semiconductor structure includes a first die including a first surface and a
second surface opposite to the first surface; a molding surrounding the first die; a first via …
second surface opposite to the first surface; a molding surrounding the first die; a first via …
Semiconductor package including a rewiring layer with an embedded chip
KIM Ji-Hwang, JB Shim, JO Cha-Jea, WI Lee - US Patent 9,997,446, 2018 - Google Patents
(57) ABSTRACT A semiconductor package includes a substrate, a rewiring layer, a plurality
of semiconductor chip stack structures, and a second semiconductor chip. The rewiring layer …
of semiconductor chip stack structures, and a second semiconductor chip. The rewiring layer …
Multi-chip modules formed using wafer-level processing of a reconstitute wafer
L Wang, R Katkar - US Patent 10,217,720, 2019 - Google Patents
Apparatuses and methods are described. This apparatus includes a bridge die having first
contacts on a die surface being in a molding layer of a reconstituted wafer. The reconstituted …
contacts on a die surface being in a molding layer of a reconstituted wafer. The reconstituted …
Electronic device package
JY Choi, ES Song, S Cha, YH Lee - US Patent 10,424,571, 2019 - Google Patents
An electronic device package includes a package substrate, an interposer located above the
package substrate and elec trically connected to the package substrate, a processing device …
package substrate and elec trically connected to the package substrate, a processing device …
High density interconnection using fanout interposer chiplet
J Zhai, C Zhong, K Hu - US Patent 10,943,869, 2021 - Google Patents
Multiple component package structures are described in which an interposer chiplet is
integrated to provide fine routing between components. In an embodiment, the inter poser …
integrated to provide fine routing between components. In an embodiment, the inter poser …
Direct bonded heterogeneous integration packaging structures
Direct bonding heterogeneous integration packaging structures and processes include a
packaging substrate with first and second opposing surfaces. A trench or a pedestal is …
packaging substrate with first and second opposing surfaces. A trench or a pedestal is …
Cryogenic electronic packages and methods for fabricating cryogenic electronic packages
RN Das, EA Dauler - US Patent 10,381,541, 2019 - Google Patents
A cryogenic electronic package includes a first superconducting multi-chip module (SMCM),
a superconducting interposer, a second SMCM and a superconducting semiconductor …
a superconducting interposer, a second SMCM and a superconducting semiconductor …