A novel partial-ground-plane-based MOSFET on selective buried oxide: 2-D simulation study

SA Loan, S Qureshi, SSK Iyer - IEEE Transactions on Electron …, 2010 - ieeexplore.ieee.org
A novel partial-ground-plane (PGP)-based MOSFET on a selective buried oxide (SELBOX),
named PGP-SELBOX, is proposed. An extensive simulation study and the comparative …

Current annealing to improve drain output performance of β-Ga2O3 field-effect transistor

H Bae, KS Lee, DY Peide, JY Park - Solid-State Electronics, 2021 - Elsevier
Current annealing, which utilizes high level of drain current during device fabrication, is
proposed. A semiconductor device β-Ga 2 O 3 field-effect transistor is preferred as test …

Study of novel techniques for reducing self-heating effects in SOI power LDMOS

J Roig, D Flores, S Hidalgo, M Vellvehi, J Rebollo… - Solid-State …, 2002 - Elsevier
Self-heating effects in silicon-on-insulator (SOI) power devices have become a serious
problem when the active silicon layer thickness is reduced and buried oxide thickness is …

[PDF][PDF] Impact of dielectrics in SOI FinFET for lower power consumption in punch-through current-based local thermal annealing

DW Cha, JY Park - JOURNAL OF SEMICONDUCTOR …, 2021 - journal.auric.kr
Impact of device geometric structures and materials is discussed to improve power efficiency
of punch-through current based electro-thermal annealing (ETA). Various sensitivities that …

Patterned buried oxide layers under a single MOSFET to improve the device performance

Y Dong, M Chen, J Chen, X Wang… - Semiconductor …, 2003 - iopscience.iop.org
A novel quasi-silicon-on-insulator (Q-SOI) metal-oxide-semiconductor field-effect transistor
(MOSFET) has been successfully fabricated, where the drain and source regions were …

A novel nanoscale FD-SOI MOSFET with energy barrier and heat-sink engineering for enhanced electric field uniformity

MK Anvarifard, Z Ramezani - Micro and Nanostructures, 2024 - Elsevier
This paper aims to present a novel method to mitigate the undesirable issues associated
with short-channel-effects (SCEs) and the critical lattice temperature of a fully depleted …

Low temperature direct bonding of InP and Si3N4-coated silicon wafers for photonic device integration

Y Wang, DKT Ng, Q Wang, J Pu, C Liu… - Journal of The …, 2012 - iopscience.iop.org
Low temperature (200 C) direct bonding of InP and Si 3 N 4 coated silicon wafers using
oxygen plasma surface treatment has been demonstrated, which transfers InP-based thin …

[HTML][HTML] 新型SOANN 埋层SOI 器件的自加热效应研究

曹磊, 刘红侠 - 物理学报, 2012 - cpsjournals.cn
本文提出了一个新型的S01 埋层结构SOANN (siliconon aluminum nitride with nothing), 用AIN
代替传统的Si02 材料, 并在S01 埋氧化层中引入空洞散热通道. 分析了新结构S01 …

[PDF][PDF] 注氮工艺对SOI 材料抗辐照性能的影响

张恩霞, 钱聪, 张正选, 王曦, 张国强, 李宁, 郑中山… - 2005 - jos.ac.cn
分别采用一步和分步注入的工艺制备了氧氮共注形成SOI (SIMON) 材料, 并对退火后的材料进行
了二次离子质谱(SIMS) 分析, 结果发现退火之后氮原子大多数聚集在SiO2/Si 界面处 …

Numerical study of self-heating effects of small-size MOSFETs fabricated on silicon-on-aluminum nitride substrate

D Yan-Fang, ZHU Ming, ZHU Zi-Qiang… - Nuclear science and …, 2006 - Elsevier
Compared with bulk-silicon technology, silicon-on-insulator (SOI) technology possesses
many advantages but it is inevitable that the buried silicon dioxide layer also thermally …