A survey on graph processing accelerators: Challenges and opportunities
Graph is a well known data structure to represent the associated relationships in a variety of
applications, eg, data science and machine learning. Despite a wealth of existing efforts on …
applications, eg, data science and machine learning. Despite a wealth of existing efforts on …
Shuhai: Benchmarking high bandwidth memory on fpgas
FPGAs are starting to be enhanced with High Bandwidth Memory (HBM) as a way to reduce
the memory bandwidth bottleneck encountered in some applications and to give the FPGA …
the memory bandwidth bottleneck encountered in some applications and to give the FPGA …
[HTML][HTML] A prefetching indexing scheme for in-memory database systems
Q Zhang, H Song, K Zhou, J Wei, C Xiao - Future Generation Computer …, 2024 - Elsevier
In-memory databases (IMDBs) store all working data in the main memory, making memory
access the dominant factor in system performance. Moreover, for modern multi-version …
access the dominant factor in system performance. Moreover, for modern multi-version …
Hitgraph: High-throughput graph processing framework on fpga
This paper presents, HitGraph, an FPGA framework to accelerate graph processing based
on the edge-centric paradigm. HitGraph takes in an edge-centric graph algorithm and …
on the edge-centric paradigm. HitGraph takes in an edge-centric graph algorithm and …
A customizable matrix multiplication framework for the intel harpv2 xeon+ fpga platform: A deep learning case study
General Matrix to Matrix multiplication (GEMM) is the cornerstone for a wide gamut of
applications in high performance computing (HPC), scientific computing (SC) and more …
applications in high performance computing (HPC), scientific computing (SC) and more …
Designing far memory data structures: Think outside the box
Technologies like RDMA and Gen-Z, which give access to memory outside the box, are
gaining in popularity. These technologies provide the abstraction of far memory, where …
gaining in popularity. These technologies provide the abstraction of far memory, where …
A hypervisor for shared-memory FPGA platforms
Cloud providers widely deploy FPGAs as application-specific accelerators for customer use.
These providers seek to multiplex their FPGAs among customers via virtualization, thereby …
These providers seek to multiplex their FPGAs among customers via virtualization, thereby …
Analysis and modeling of collaborative execution strategies for heterogeneous CPU-FPGA architectures
Heterogeneous CPU-FPGA systems are evolving towards tighter integration between CPUs
and FPGAs for improved performance and energy efficiency. At the same time …
and FPGAs for improved performance and energy efficiency. At the same time …
Demystifying datapath accelerator enhanced off-path smartnic
X Chen, J Zhang, T Fu, Y Shen, S Ma, K Qian… - arXiv preprint arXiv …, 2024 - arxiv.org
Network speeds grow quickly in the modern cloud, so SmartNICs are introduced to offload
network processing tasks, even application logic. However, typical multicore SmartNICs …
network processing tasks, even application logic. However, typical multicore SmartNICs …
Toward FPGA-based HPC: Advancing interconnect technologies
HPC architects are currently facing myriad challenges from ever tighter power constraints
and changing workload characteristics. In this article, we discuss the current state of FPGAs …
and changing workload characteristics. In this article, we discuss the current state of FPGAs …