Apparatus and methods for compensation of signal path delay variation
RP Nelson - US Patent 10,623,006, 2020 - Google Patents
Apparatus and methods for clock synchronization and fre quency translation are provided
herein. Clock synchroniza tion and frequency translation integrated circuits (ICs) gen erate …
herein. Clock synchroniza tion and frequency translation integrated circuits (ICs) gen erate …
Apparatus and methods for system clock compensation
NE Weeks, RP Nelson - US Patent 11,038,511, 2021 - Google Patents
Apparatus and methods for clock synchronization and frequency translation are provided
herein. Clock synchronization and frequency translation integrated circuits (ICs) generate …
herein. Clock synchronization and frequency translation integrated circuits (ICs) generate …
Low power regulator circuits, systems and methods regarding the same
B Pishdad - US Patent 10,571,945, 2020 - Google Patents
Disclosed are low power (eg, nanowatt) voltage regulator circuits and devices, systems and
methods using the same for ultra-low power applications, such as, but not limited to, Internet …
methods using the same for ultra-low power applications, such as, but not limited to, Internet …
Apparatus and methods for distributed timing using digital time stamps from a time-to-digital converter
RP Nelson, NE Weeks - US Patent 10,749,535, 2020 - Google Patents
Apparatus and methods for clock synchronization and frequency translation are provided
herein. Clock synchronization and frequency translation integrated circuits (ICs) generate …
herein. Clock synchronization and frequency translation integrated circuits (ICs) generate …
Reference monitors with dynamically controlled latency
RP Nelson - US Patent 10,848,161, 2020 - Google Patents
Apparatus and methods for clock synchronization and frequency translation are provided
herein. Clock synchronization and frequency translation integrated circuits (ICs) generate …
herein. Clock synchronization and frequency translation integrated circuits (ICs) generate …
Apparatus and methods for system clock compensation
RP Nelson - US Patent 10,749,534, 2020 - Google Patents
Apparatus and methods for clock synchronization and frequency translation are provided
herein. Clock synchronization and frequency translation integrated circuits (ICs) generate …
herein. Clock synchronization and frequency translation integrated circuits (ICs) generate …
Process, voltage and temperature tolerant clock generator
M Ensafdaran - US Patent 10,635,130, 2020 - Google Patents
Devices, methods, and systems are described that generate process, voltage and
temperature tolerant clock generators, which can be used in low power and low cost …
temperature tolerant clock generators, which can be used in low power and low cost …
Power management system including a direct-current to direct-current converter having a plurality of switches
F Mahmoudi, H Hedayati, M Ensafdaran… - US Patent …, 2020 - Google Patents
The disclosed technology can be used to convert direct current voltage and current from an
input to a different or the same voltage and current at an output. One example direct current …
input to a different or the same voltage and current at an output. One example direct current …
Dynamic calibration of frequency and power storage interface
Y Tzafrir, M Zehavi, E Widder - US Patent 10,924,113, 2021 - Google Patents
(57) ABSTRACT A data storage device includes a controller and a memory. The controller
includes a host interface and a memory interface. The controller receives inputs from the …
includes a host interface and a memory interface. The controller receives inputs from the …
Systems and methods of adjusting an interface bus speed
M Zehavi, Y Tzafrir, M Asfur - US Patent 10,198,383, 2019 - Google Patents
US10198383B2 - Systems and methods of adjusting an interface bus speed - Google
Patents US10198383B2 - Systems and methods of adjusting an interface bus speed …
Patents US10198383B2 - Systems and methods of adjusting an interface bus speed …