Interconnect-memory challenges for multi-chip, silicon interposer systems
Silicon interposer technology is promising for large-scale integration of memory within a
processor package. While past work on vertical, 3D-stacked memory allows a stack of …
processor package. While past work on vertical, 3D-stacked memory allows a stack of …
Transmuter: Bridging the efficiency gap using memory and dataflow reconfiguration
With the end of Dennard scaling and Moore's law, it is becoming increasingly difficult to build
hardware for emerging applications that meet power and performance targets, while …
hardware for emerging applications that meet power and performance targets, while …
There and back again: Optimizing the interconnect in networks of memory cubes
High-performance computing, enterprise, and datacenter servers are driving demands for
higher total memory capacity as well as memory performance. Memory" cubes" with high per …
higher total memory capacity as well as memory performance. Memory" cubes" with high per …
Dynamic resource sharing for high-performance 3-D networks-on-chip
3D logic-on-logic technology is a promising approach for extending the validity of Moore's
law when technology scaling stops. 3D technology can also lead to a paradigm shift in on …
law when technology scaling stops. 3D technology can also lead to a paradigm shift in on …
Galaxyfly: A novel family of flexible-radix low-diameter topologies for large-scales interconnection networks
F Lei, D Dong, X Liao, X Su, C Li - Proceedings of the 2016 International …, 2016 - dl.acm.org
Interconnection network plays an essential role in the architecture of large-scale high
performance computing (HPC) systems. In the paper, we construct a novel family of low …
performance computing (HPC) systems. In the paper, we construct a novel family of low …
Fault-tolerant 3-D network-on-chip design using dynamic link sharing
SHS Rezaei, M Modarressi… - … , Automation & Test …, 2016 - ieeexplore.ieee.org
The most important challenge in the emerging 3D integration technology is the higher
temperature, particularly in the layers that are more distant from the heat sink, compared to …
temperature, particularly in the layers that are more distant from the heat sink, compared to …
[PDF][PDF] 三维片上网络体系结构研究综述
李晨， 马胜， 王璐， 郭阳 - 计算机学报, 2016 - cjc.ict.ac.cn
摘要伴随着三维集成电路的迅速发展, 三维片上网络受到国内外研究者的广泛关注.
三维片上网络主要用于实现三维堆叠芯片的互连通信, 为三维集成电路提供超低的延迟和竖直 …
三维片上网络主要用于实现三维堆叠芯片的互连通信, 为三维集成电路提供超低的延迟和竖直 …
Hybrid memory buffer microarchitecture for high-radix routers
Hierarchical high-radix router microarchitecture consisting of small SRAM-based
intermediate buffers has been used in large-scale supercomputers interconnection …
intermediate buffers has been used in large-scale supercomputers interconnection …
On reinforcement learning in genetic regulatory networks
The control of probabilistic Boolean networks as a model of genetic regulatory networks is
formulated as an optimal stochastic control problem and has been solved using dynamic …
formulated as an optimal stochastic control problem and has been solved using dynamic …
Exploiting Reconfiguration and Co-Design for Domain-Agnostic Hardware Acceleration
S Kim - 2023 - deepblue.lib.umich.edu
Hardware accelerators have become permanent features in the post-Dennard computing
landscape, displacing conventional processors for a variety of applications. Not only have …
landscape, displacing conventional processors for a variety of applications. Not only have …