Digital and analog TFET circuits: Design and benchmark
In this work, we investigate by means of simulations the performance of basic digital, analog,
and mixed-signal circuits employing tunnel-FETs (TFETs). The analysis reviews and …
and mixed-signal circuits employing tunnel-FETs (TFETs). The analysis reviews and …
Strained silicon complementary TFET SRAM: Experimental demonstration and simulations
GV Luong, S Strangio, AT Tiedemann… - IEEE journal of the …, 2018 - ieeexplore.ieee.org
A half SRAM cell with strained Si nanowire complementary tunnel-FETs (TFETs) was
fabricated and characterized to explore the feasibility and functionality of 6T-SRAM based …
fabricated and characterized to explore the feasibility and functionality of 6T-SRAM based …
Detection of breast cancer Cell-MDA-MB-231 by measuring conductivity of Schottky source/drain GaN FinFET
In this paper, a new Gallium Nitride (GaN) Fin Field Effect Transistor (FinFET) with Schottky
Source/Drain is proposed for detection of breast cancer cells by studying the change in …
Source/Drain is proposed for detection of breast cancer cells by studying the change in …
A 16 nm finfet circuit with triple function as digital multiplexer, active-high and active-low output decoder for high-performance sram architecture
This paper presents a fin field-effect transistor (FinFET)-based single circuit (FSC) used to
realize an active-high output decoder (AHD), active-low output decoder (ALD) and digital …
realize an active-high output decoder (AHD), active-low output decoder (ALD) and digital …
Designing and Reliability analysis of radiation hardened Stacked gate Junctionless FinFET and CMOS Inverter
Along with radiation sensing, necessity to study and design reliable radiation hardened
devices is also increasing now-a-days. These devices are tolerant to high dosage of …
devices is also increasing now-a-days. These devices are tolerant to high dosage of …
Operational transconductance amplifier designed with nanowire tunnel-FET with Si, SiGe and Ge sources using experimental data
A de Moraes Nogueira, PG Der Agopian… - Semiconductor …, 2020 - iopscience.iop.org
In this paper operational transconductance amplifiers (OTA) were designed with nanowire
(NW) tunnel field effect transistors (TFET) with different source materials (Si, SiGe, and Ge) …
(NW) tunnel field effect transistors (TFET) with different source materials (Si, SiGe, and Ge) …
Performance evaluation of Tunnel-FET basic amplifier circuits
RS Rangel, PGD Agopian… - 2019 IEEE 10th Latin …, 2019 - ieeexplore.ieee.org
This work analyzes the performance of measured Tunneling Field-Effect Transistors (TFET)
when applied to analog circuits. The method uses a look-up table based behavioral model …
when applied to analog circuits. The method uses a look-up table based behavioral model …
An efficient single-stage carry select adder using excess-1 FinFET circuit in 22 nm technology
J Battini, S Kosaraju - Semiconductor Science and Technology, 2024 - iopscience.iop.org
Conventional carry select adders (CCSA) have two stages and are followed by multiplexers.
CCSAs use ripple carry adders at two stages, which will introduce much delay due to carry …
CCSAs use ripple carry adders at two stages, which will introduce much delay due to carry …
A tunnel-FET device model based on Verilog-A applied to circuit simulation
RS Rangel, PGD Agopian… - 2018 33rd Symposium on …, 2018 - ieeexplore.ieee.org
This work proposes a simple methodology for using Tunnel-FET devices, which do not have
any accurate first order analytic models, for allowing the integrated circuit simulation with …
any accurate first order analytic models, for allowing the integrated circuit simulation with …
Silicon nanowire Tunnel-FET differential amplifier using Verilog-A lookup table approach
AM Nogueira, PGD Agopian… - 2019 34th Symposium on …, 2019 - ieeexplore.ieee.org
Electrical characterization of a silicon nanowire Tunnel Field Effect Transistor (TFET) is used
to construct a lookup table in order to model and simulate analog circuit through Verilog-A …
to construct a lookup table in order to model and simulate analog circuit through Verilog-A …