System, method, and computer program product for improving memory systems

MS Smith - US Patent 9,432,298, 2016 - Google Patents
H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid
state devices; Multistep manufacturing processes thereof the devices being of types …

HVAC actuator with automatic end stop recalibration

GA Romanowich, RK Alexander - US Patent 9,641,122, 2017 - Google Patents
An actuator in a HVAC system includes a motor and a drive device driven by the motor. The
drive device is coupled to a movable HVAC component for driving the movable HVAC …

Digit line comparison circuits

DA Klein - US Patent 8,446,783, 2013 - Google Patents
(57) ABSTRACT A DRAM includes a register storing subsets of roW addresses
corresponding to roWs containing at least one memory cell that is unable to store a data bit …

Digit line comparison circuits

DA Klein - US Patent 8,279,683, 2012 - Google Patents
A DRAM includes a register storing subsets of row addresses corresponding to rows
containing at least one memory cell that is unable to store a data bit during a normal refresh …

Method and system for storage of data in non-volatile media

JCR Bennett - US Patent 8,452,929, 2013 - Google Patents
A system and method for managing the storage of data in non-volatile memory is described.
In an aspect, the data may be described by metadata and a transaction log file that are …

Memory module including a plurality of integrated circuit memory devices and a plurality of buffer devices in a matrix topology

E Tsern - US Patent 7,464,225, 2008 - Google Patents
G11C11/401—Digital stores characterised by the use of particular electric or magnetic
storage elements; Storage elements therefor using electric elements using semiconductor …

Memory system topologies including a buffer device and an integrated circuit memory device

I Shaeffer, E Tsern, C Hampel - US Patent 7,562,271, 2009 - Google Patents
Systems, among other embodiments, include topologies (data and/or control/address
information) between an inte grated circuit buffer device (that may be coupled to a master …

Prefetch mechanism for use in a system including a host connected to a plurality of memory modules via a serial memory interconnect

F Weber, R La Fetra, P Miranda - US Patent App. 10/842,339, 2005 - Google Patents
(57) ABSTRACT A System includes a host coupled to a Serially connected chain of memory
modules. In one embodiment, the host includes a memory controller that may be configured …

Memory systems with variable delays for write data signals

FA Ware - US Patent 7,301,831, 2007 - Google Patents
Abstract Systems and methods for generating write data signals having variable delays for
use in write operations to memory components are provided. These memory systems and …

System including a buffered memory module

E Tsern, I Shaeffer, C Hampel - US Patent 7,729,151, 2010 - Google Patents
4,644,532 4,667,305 4,747,070 4,747,100 4,858,107 4,864,563 4,947,257 4,965,799
4,977.498 5,034,917 5,068,650 5,228,132 5,228, 134 5,243,703 5,283,877 5, 301278 …