A full spectrum of computing-in-memory technologies

Z Sun, S Kvatinsky, X Si, A Mehonic, Y Cai… - Nature Electronics, 2023 - nature.com
Computing in memory (CIM) could be used to overcome the von Neumann bottleneck and to
provide sustainable improvements in computing throughput and energy efficiency …

Scaling for edge inference of deep neural networks

X Xu, Y Ding, SX Hu, M Niemier, J Cong, Y Hu… - Nature Electronics, 2018 - nature.com
Deep neural networks offer considerable potential across a range of applications, from
advanced manufacturing to autonomous cars. A clear trend in deep neural networks is the …

Compute in‐memory with non‐volatile elements for neural networks: A review from a co‐design perspective

W Haensch, A Raghunathan, K Roy… - Advanced …, 2023 - Wiley Online Library
Deep learning has become ubiquitous, touching daily lives across the globe. Today,
traditional computer architectures are stressed to their limits in efficiently executing the …

X-SRAM: Enabling in-memory Boolean computations in CMOS static random access memories

A Agrawal, A Jaiswal, C Lee… - IEEE Transactions on …, 2018 - ieeexplore.ieee.org
Silicon-based static random access memories (SRAM) and digital Boolean logic have been
the workhorse of the state-of-the-art computing platforms. Despite tremendous strides in …

HERMES-Core—A 1.59-TOPS/mm2 PCM on 14-nm CMOS In-Memory Compute Core Using 300-ps/LSB Linearized CCO-Based ADCs

R Khaddam-Aljameh, M Stanisavljevic… - IEEE Journal of Solid …, 2022 - ieeexplore.ieee.org
We present a 256 256 in-memory compute (IMC) core designed and fabricated in 14-nm
CMOS technology with backend-integrated multi-level phase change memory (PCM). It …

Neuromorphic active pixel image sensor array for visual memory

S Hong, H Cho, BH Kang, K Park, D Akinwande… - ACS …, 2021 - ACS Publications
Neuromorphic engineering, a methodology for emulating synaptic functions or neural
systems, has attracted tremendous attention for achieving next-generation artificial …

IMAC: In-memory multi-bit multiplication and accumulation in 6T SRAM array

M Ali, A Jaiswal, S Kodge, A Agrawal… - … on Circuits and …, 2020 - ieeexplore.ieee.org
In-memory computing'is being widely explored as a novel computing paradigm to mitigate
the well known memory bottleneck. This emerging paradigm aims at embedding some …

Resistive crossbars as approximate hardware building blocks for machine learning: Opportunities and challenges

I Chakraborty, M Ali, A Ankit, S Jain, S Roy… - Proceedings of the …, 2020 - ieeexplore.ieee.org
Traditional computing systems based on the von Neumann architecture are fundamentally
bottlenecked by data transfers between processors and memory. The emergence of data …

In-memory low-cost bit-serial addition using commodity DRAM technology

MF Ali, A Jaiswal, K Roy - … on Circuits and Systems I: Regular …, 2019 - ieeexplore.ieee.org
In-memory computing architectures present a promising solution to address the memoryand
the power-wall challenges by mitigating the bottleneck between processing units and …

A survey of SRAM-based in-memory computing techniques and applications

S Mittal, G Verma, B Kaushik, FA Khanday - Journal of Systems …, 2021 - Elsevier
As von Neumann computing architectures become increasingly constrained by data-
movement overheads, researchers have started exploring in-memory computing (IMC) …