Advanced virtual prototyping for cyber-physical systems using RISC-V: implementation, verification and challenges
V Herdt, R Drechsler - Science China Information Sciences, 2022 - Springer
Virtual prototypes (VPs) are crucial in today's design flow. VPs are predominantly created in
SystemC transaction-level modeling (TLM) and are leveraged for early software …
SystemC transaction-level modeling (TLM) and are leveraged for early software …
Large circuit models: opportunities and challenges
Within the electronic design automation (EDA) domain, artificial intelligence (AI)-driven
solutions have emerged as formidable tools, yet they typically augment rather than redefine …
solutions have emerged as formidable tools, yet they typically augment rather than redefine …
[图书][B] Enhanced Virtual Prototyping
Virtual Prototypes (VPs) play a very important role to cope with the rising complexity in the
design flow of embedded devices. A VP is essentially an executable abstract model of the …
design flow of embedded devices. A VP is essentially an executable abstract model of the …
Embedding online runtime verification for fault disambiguation on robonaut2
Abstract Robonaut2 (R2) is a humanoid robot onboard the International Space Station (ISS),
performing specialized tasks in collaboration with astronauts. After deployment, R2 …
performing specialized tasks in collaboration with astronauts. After deployment, R2 …
The dawn of ai-native eda: Promises and challenges of large circuit models
Within the Electronic Design Automation (EDA) domain, AI-driven solutions have emerged
as formidable tools, yet they typically augment rather than redefine existing methodologies …
as formidable tools, yet they typically augment rather than redefine existing methodologies …
Formal security verification of concurrent firmware in SoCs using instruction-level abstraction for hardware
Formal security verification of firmware interacting with hardware in modern Systems-on-
Chip (SoCs) is a critical research problem. This faces the following challenges:(1) design …
Chip (SoCs) is a critical research problem. This faces the following challenges:(1) design …
Early concolic testing of embedded binaries with virtual prototypes: A RISC-V case study
Extensive testing of IoT SW is very important to prevent errors and security vulnerabilities. In
the SW domain the automated concolic testing technique has been shown very effective. In …
the SW domain the automated concolic testing technique has been shown very effective. In …
Mesh based obfuscation of analog circuit properties
In this paper, a technique to design analog circuits with enhanced security is described. The
proposed key based obfuscation technique uses a mesh topology to obfuscate the physical …
proposed key based obfuscation technique uses a mesh topology to obfuscate the physical …
Generating architecture-level abstractions from RTL designs for processors and accelerators part i: Determining architectural state variables
Today's Systems-on-Chips (SoCs) comprise general/special purpose programmable
processors and specialized hardware modules referred to as accelerators. These …
processors and specialized hardware modules referred to as accelerators. These …
Formal verification of security critical hardware-firmware interactions in commercial SoCs
We present an effective methodology for formally verifying security-critical flows in a
commercial System-on-Chip (SoC) which involve extensive interaction between firmware …
commercial System-on-Chip (SoC) which involve extensive interaction between firmware …