A review on SRAM memory design using FinFET technology

TV Lakshmi, M Kamaraju - International Journal of System Dynamics …, 2021 - igi-global.com
An innovative technology named FinFET (Fin Field Effect Transistor) has been developed to
offer better transistor circuit design and to compensate the necessity of superior storage …

Robustness evaluation of electrical characteristics of sub-22 nm FinFETs affected by physical variability

BM Kalasapati, SL Tripathi - Materials Today: Proceedings, 2022 - Elsevier
The physical parameters of digital devices have been affected by process variability The
paper is focused on subthreshold performance characterization of FET with Visual TCAD …

Design and analysis of CMOS based 6T SRAM cell at different technology nodes

M Devi, C Madhu, N Garg - Materials Today: Proceedings, 2020 - Elsevier
The CMOS technology is rapidly growing towards large scale integration on a single chip
leading to smaller size consuming smaller area. The demand for speed and efficiency are …

Design and analysis of 10T SRAM cell with stability characterizations

D Sharma, S Birla - 2021 International Conference on …, 2021 - ieeexplore.ieee.org
Nowadays, the use of Static random-access memory (SRAM) is increasing in System on
Chip and VLSI circuits with the arrival of portable devices. Our main focus of research is …

Design and Stability analysis of CNTFET based SRAM cell

M Devi, C Madhu, N Garg, S Singh… - IOP Conference Series …, 2021 - iopscience.iop.org
Abstract Carbon Nanotube Field Effect Transistor (CNTFET) has proved to be very beneficial
for VLSI circuit designs in the nano scale range due to its amazing properties than …

Static Noise Margin Analysis of Various SRAM Array

AR Krishnan, G Shekar - 2020 International Conference on …, 2020 - ieeexplore.ieee.org
Decreasing the power consumption and growing the noise margin have turn out to be two
imperative topics in the artwork SRAM design. Recent works have proven that the traditional …

Various SRAM Condition to Design the FINFET with Operating of Different Condition in Voltage

T Muthumanickam, T Sheela… - 2022 6th International …, 2022 - ieeexplore.ieee.org
Technologies involved CMOS, are reaching the nano processing realm by resulting in
several scaling challenges in the case of complementary MoSFETs, which have a short level …

Lanthanum Doped Zirconium Oxide (LaZrO2) High-k Gate Dielectric FinFET SRAM Cell Optimization

G Kaur, SS Gill, M Rattan - Transactions on Electrical and Electronic …, 2021 - Springer
Inherent variations and the challenge of leakage current control in today's silicon-on-
insulator metal–oxide–semiconductor field-effect transistor limits the scaling of static random …

Literature review of the SRAM circuit design challenges

I Mahdi, Y Guerbai, Y Meraihi… - Device Circuit Co-Design …, 2023 - taylorfrancis.com
The majority of current embedded systems use microprocessors equipped with volatile
cache memory based on static random access memory (SRAM) technology. As part of a …

Investigating the Impact of Technology Scaling on Stability Performance of Subthreshold Static Random Access Memory Bitcell Topologies

AS Gaadhe, VN Patil… - Journal of Electrical …, 2024 - search.proquest.com
Static random-access memory (SRAM) is increasingly being used in VLSI circuits as a result
of the development of portable devices. As the demand for low-power devices increases …