MrDP: Multiple-row detailed placement of heterogeneous-sized cells for advanced nodes
As very large-scale integration technology shrinks to fewer tracks per standard cell, eg, from
10 to 7.5-track libraries (and lesser for 7 nm), there has been a rapid increase in the usage …
10 to 7.5-track libraries (and lesser for 7 nm), there has been a rapid increase in the usage …
ICCAD-2017 CAD contest in multi-deck standard cell legalization and benchmarks
NK Darav, IS Bustany, A Kennings… - 2017 IEEE/ACM …, 2017 - ieeexplore.ieee.org
An increasing number of multi-deck cells occupying multiple rows (eg multi-bit registers) are
used in advanced node technologies to achieve low power and high performance. The multi …
used in advanced node technologies to achieve low power and high performance. The multi …
Mixed-cell-height legalization considering technology and region constraints
Mixed-cell-height circuits have become popular in advanced technologies for better power,
area, routability, and performance tradeoffs. With technology and region constraints imposed …
area, routability, and performance tradeoffs. With technology and region constraints imposed …
Analytical mixed-cell-height legalization considering average and maximum movement minimization
Modern circuit designs often contain standard cells of different row heights to meet various
design requirements. Due to the higher interference among heterogeneous cell structures …
design requirements. Due to the higher interference among heterogeneous cell structures …
Algorithm selection framework for legalization using deep convolutional neural networks and transfer learning
R Netto, S Fabre, TA Fontana… - … on Computer-Aided …, 2021 - ieeexplore.ieee.org
Machine learning (ML) models have been used to improve the quality of different physical
design steps, such as timing analysis, clock tree synthesis, and routing. However, so far very …
design steps, such as timing analysis, clock tree synthesis, and routing. However, so far very …
A robust modulus-based matrix splitting iteration method for mixed-cell-height circuit legalization
Modern circuits often contain standard cells of different row heights to meet various design
requirements. Taller cells give larger drive strengths and higher speed at the cost of larger …
requirements. Taller cells give larger drive strengths and higher speed at the cost of larger …
Integrating operations research into very large-scale integrated circuits placement design: A review
The placement stage of the physical design of very large-scale integrated circuits (VLSI)
specifies the arrangement and order of standard cells and devices within an area, and the …
specifies the arrangement and order of standard cells and devices within an area, and the …
Dali: A gridded cell placement flow
Asynchronous Very-Large-Scale-Integration (VLSI) has several potential benefits over its
synchronous counterparts, such as reduced power consumption, elastic pipelining, and …
synchronous counterparts, such as reduced power consumption, elastic pipelining, and …
An accelerated modulus-based matrix splitting iteration method for mixed-size cell circuits legalization
CC Zhou, J Qiu, Y Cao, GC Yang, QQ Shen, Q Shi - Integration, 2023 - Elsevier
Mixed-size cell circuits dominate in advanced technology node designs, with attendant
increases in layout complexity. The introduction of multi-row-height cells requires additional …
increases in layout complexity. The introduction of multi-row-height cells requires additional …
Placement legalization amenable to mixed-cell-height standard cells integrating into state-of-the-art commercial eda tool
H Kim, T Kim - Proceedings of the Great Lakes Symposium on VLSI …, 2023 - dl.acm.org
Conventional standard cell libraries are composed of cells of diverse logic functions, all of
which commonly and strictly maintain an equal height ie, single-row-height. However, as the …
which commonly and strictly maintain an equal height ie, single-row-height. However, as the …