二维Mesh 结构的片上网络中利用全局信息的路由算法
陆超， 陈云霁， 刘少礼 - 计算机辅助设计与图形学学报, 2014 - jcad.cn
针对目前片上网络自适应路由算法中存在的不足, 对二维mesh 结构进行分析和推导,
提出一种基于全局信息的片上网络路由算法. 首先计算路由关键区域各个节点的权重并将其存储 …
提出一种基于全局信息的片上网络路由算法. 首先计算路由关键区域各个节点的权重并将其存储 …
异步2D-Torus 片上网络自适应路由算法
李贞妮， 李晶皎， 方志强， 王骄 - 东北大学学报(自然科学版), 2015 - xuebao.neu.edu.cn
采用异步电路设计方法学, 针对确定性路由算法在异步片上网络实现中遇到的容易阻塞和路由
资源浪费等问题, 提出了一种适用于2D-Torus 拓扑结构的异步片上网络自适应路由算法 …
资源浪费等问题, 提出了一种适用于2D-Torus 拓扑结构的异步片上网络自适应路由算法 …
AFTER: Asynchronous fault-tolerant router design in network-on-chip
Y Ouyang, Q Chen, X Wang, X Ouyang… - Journal of Circuits …, 2016 - World Scientific
Large scale synchronous network-on-chip (NoC) requires complex clock tree design, which
leads to a large area overhead and power consumption. Based on handshaking protocols …
leads to a large area overhead and power consumption. Based on handshaking protocols …
A high-speed and low-power synchronous and asynchronous packaging circuit based on standard gates under four-phase one-hot encoding
Compared with common bus system, GALS (Global Asynchronous Locally Synchronous)
bus system can combine the respective advantages of synchronous circuits and …
bus system can combine the respective advantages of synchronous circuits and …
An asynchronous GFSK demodulator for automatic meter reading
Y Liu, G Wu, H Chen, A He - 2016 IEEE International …, 2016 - ieeexplore.ieee.org
Automatic Meter Reading (AMR) technologies play an important role for smart grid. A Muller
pipeline based asynchronous Gaussian Frequency-Shift Keying (GFSK) demodulator of …
pipeline based asynchronous Gaussian Frequency-Shift Keying (GFSK) demodulator of …
An asynchronous loop structure based on the click element
Y Liu, H Chen, D Wang, A He - 2017 International Conference …, 2017 - ieeexplore.ieee.org
We present a click-element-based asynchronous loop structure for control path of
asynchronous micro-control unit (MCU). The loop, which has one-stage control circuit …
asynchronous micro-control unit (MCU). The loop, which has one-stage control circuit …
An Asynchronous 2D-Torus Network-on-Chip Using Adaptive Routing Algorithm
Z Li, J Li, A Yan, L Yao - … , BigCom 2016, Shenyang, China, July 29-31 …, 2016 - Springer
Abstract An asynchronous 2D-Torus Network-on-Chip (ATNoC) design based on System
Verilog is implemented in this paper. A dynamic asynchronous XY routing algorithm DA-XY …
Verilog is implemented in this paper. A dynamic asynchronous XY routing algorithm DA-XY …
A high-speed and low-power synchronous and asynchronous packaging circuit based on standard gates under four-phase dual-rail protocol
Asynchronous circuits have the advantages of high speed and low power consumption, but
they can not work together with the synchronous module, thus synchronous and …
they can not work together with the synchronous module, thus synchronous and …