The charge-pump (CP) mismatch current is a dominant source of static phase error and
reference spur in the nano-meter CMOS PLL implementations due to its worsened channel …

A wide-frequency-range low-power synthesizer based on an eight-stage differential ring
oscillator (RO) regulated by a phase locked loop (PLL) is introduced. It is specially designed …

In this paper, to analyze the tuning range (TR) of transistors, we introduced two streamlined
modeling approaches that can precisely predict the extent and direction of the TR. The first …

The class-D power amplifier (PA) is commonly implemented in CMOS, but its operating
frequency is often limited due to the power loss of parasitic capacitances and the lower …

This work presents a 1.6 GHz to 2 GHz integer PLL with 2 MHz stepping, which is optimized
for driving low-power 180 nm switched-capacitor (SC) circuits at a 1.2 V supply. To reduce …

In this paper, an energy efficient low power on-off keying (OOK) transmitter (TX) is proposed
for wearable healthcare applications. TX is suitable for biosignal communication from …

This work introduces a method to use edge-combining to obtain Quadrature Phase Shift
Keying (QPSK) as well as Frequency Shift Keying (FSK) signals in a power efficient way to …

A low-power transmitter is proposed that applies edge-combining not only for frequency
multiplication but also for quadrature signal generation. A phase-selection modulator uses …

In diesem Artikel wird ein Ansatz zur Anwendung von Frequenzmultiplikationstechniken,
wie,, Edge-Combining “und Extraktion der dritten Oberwelle, bei integrierten Sendern mit …

This dissertation examines edge-combining capabilities for wireless applications, ranging
from low-power transmitters to mm-wave oscillator design. In general, edge-combining is a …