Intelligent computing: the latest advances, challenges, and future
Computing is a critical driving force in the development of human civilization. In recent years,
we have witnessed the emergence of intelligent computing, a new computing paradigm that …
we have witnessed the emergence of intelligent computing, a new computing paradigm that …
Challenges and trends of SRAM-based computing-in-memory for AI edge devices
CJ Jhang, CX Xue, JM Hung… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
When applied to artificial intelligence edge devices, the conventionally von Neumann
computing architecture imposes numerous challenges (eg, improving the energy efficiency) …
computing architecture imposes numerous challenges (eg, improving the energy efficiency) …
[HTML][HTML] A compute-in-memory chip based on resistive random-access memory
Realizing increasingly complex artificial intelligence (AI) functionalities directly on edge
devices calls for unprecedented energy efficiency of edge hardware. Compute-in-memory …
devices calls for unprecedented energy efficiency of edge hardware. Compute-in-memory …
A twin-8T SRAM computation-in-memory unit-macro for multibit CNN-based AI edge processors
Computation-in-memory (CIM) is a promising candidate to improve the energy efficiency of
multiply-and-accumulate (MAC) operations of artificial intelligence (AI) chips. This work …
multiply-and-accumulate (MAC) operations of artificial intelligence (AI) chips. This work …
A programmable heterogeneous microprocessor based on bit-scalable in-memory computing
In-memory computing (IMC) addresses the cost of accessing data from memory in a manner
that introduces a tradeoff between energy/throughput and computation signal-to-noise ratio …
that introduces a tradeoff between energy/throughput and computation signal-to-noise ratio …
14.3 A 65nm computing-in-memory-based CNN processor with 2.9-to-35.8 TOPS/W system energy efficiency using dynamic-sparsity performance-scaling architecture …
Computing-in-Memory (CIM) is a promising solution for energy-efficient neural network (NN)
processors. Previous CIM chips [1],[4] mainly focus on the memory macro itself, lacking …
processors. Previous CIM chips [1],[4] mainly focus on the memory macro itself, lacking …
A dual-split 6T SRAM-based computing-in-memory unit-macro with fully parallel product-sum operation for binarized DNN edge processors
Computing-in-memory (CIM) is a promising approach to reduce the latency and improve the
energy efficiency of deep neural network (DNN) artificial intelligence (AI) edge processors …
energy efficiency of deep neural network (DNN) artificial intelligence (AI) edge processors …
CAP-RAM: A charge-domain in-memory computing 6T-SRAM for accurate and precision-programmable CNN inference
A compact, accurate, and bitwidth-programmable in-memory computing (IMC) static random-
access memory (SRAM) macro, named CAP-RAM, is presented for energy-efficient …
access memory (SRAM) macro, named CAP-RAM, is presented for energy-efficient …
Scalable and programmable neural network inference accelerator based on in-memory computing
This work demonstrates a programmable in-memory-computing (IMC) inference accelerator
for scalable execution of neural network (NN) models, leveraging a high-signal-to-noise …
for scalable execution of neural network (NN) models, leveraging a high-signal-to-noise …
PIMCA: A programmable in-memory computing accelerator for energy-efficient DNN inference
This article presents a programmable in-memory computing accelerator (PIMCA) for low-
precision (1–2 b) deep neural network (DNN) inference. The custom 10T1C bitcell in the in …
precision (1–2 b) deep neural network (DNN) inference. The custom 10T1C bitcell in the in …