A reconfigurable processor for efficiently performing a vector operation, and a method of
controlling the reconfigurable processor are provided. The reconfigurable processor …

Abstract Systems and methods provide an extensible, multi-stage, realtime application
program processing load adaptive, manycore data processing architecture shared …

Abstract Systems and methods provide an extensible, multi-stage, realtime application
program processing load adaptive, manycore data processing architecture shared …

An apparatus for dynamically selecting a function includes an intercept module that
intercepts a function call from an executing application. The function call specifies a target …

Abstract Systems and methods provide a processing task load and type adaptive manycore
processor architecture, enabling flexible and efficient information processing. The …

An architecture for a load balanced groups of multi-stage manycore processors shared
dynamically among a set of software applications, with capabilities for destination task …

Candidate solutions to an optimization problem comprise a set of potential values that can
be applied to variables in a problem description. Candidate Solutions can be large because …

An apparatus for selecting an efficient processor includes a comparison module that
compares performance character istics of a plurality of processors available for execution of …

In Some embodiments, a cache may include a tag array and a data array, as well as circuitry
that detects whether accesses to the cache are sequential (eg, occupying the same cache …

BACKGROUND Programmable logic devices (“PLDs) are a well-known type of integrated
circuit that can be programmed to perform specified logic functions. One type of PLD, the …