Recent thermal management techniques for microprocessors

J Kong, SW Chung, K Skadron - ACM Computing Surveys (CSUR), 2012 - dl.acm.org
Microprocessor design has recently encountered many constraints such as power, energy,
reliability, and temperature. Among these challenging issues, temperature-related issues …

[PDF][PDF] FPGA 器件设计技术发展综述

杨海钢, 孙嘉斌, 王慰 - 电子与信息学报, 2010 - edit.jeit.ac.cn
现场可编程门阵列(Field Programmable Gate Array, FPGA) 作为一种可编程逻辑器件,
在短短二十多年里从电子设计的外围器件逐渐演变为数字系统的核心, 在计算机硬件, 通信 …

Dependable dnn accelerator for safety-critical systems: A review on the aging perspective

I Moghaddasi, S Gorgin, JA Lee - IEEE Access, 2023 - ieeexplore.ieee.org
In the modern era, artificial intelligence (AI) and deep learning (DL) seamlessly integrate into
various spheres of our daily lives. These cutting-edge disciplines have given rise to …

3D facial expression recognition based on primitive surface feature distribution

J Wang, L Yin, X Wei, Y Sun - 2006 IEEE Computer Society …, 2006 - ieeexplore.ieee.org
The creation of facial range models by 3D imaging systems has led to extensive work on 3D
face recognition [19]. However, little work has been done to study the usefulness of such …

Temperature aware task scheduling in MPSoCs

AK Coskun, TS Rosing… - 2007 Design, Automation & …, 2007 - ieeexplore.ieee.org
In deep submicron circuits, elevation in temperatures has brought new challenges in
reliability, timing, performance, cooling costs and leakage power. Conventional thermal …

Quantifying sources of error in McPAT and potential impacts on architectural studies

SL Xi, H Jacobson, P Bose, GY Wei… - 2015 IEEE 21st …, 2015 - ieeexplore.ieee.org
Architectural power modeling tools are widely used by the computer architecture community
for rapid evaluations of high-level design choices and design space explorations. Currently …

Static and dynamic temperature-aware scheduling for multiprocessor SoCs

AK Coskun, TS Rosing, KA Whisnant… - IEEE Trans. Very …, 2008 - ieeexplore.ieee.org
Thermal hot spots and high temperature gradients degrade reliability and performance, and
increase cooling costs and leakage power. In this paper, we explore the benefits of …

Accurate, pre-RTL temperature-aware design using a parameterized, geometric thermal model

W Huang, K Sankaranarayanan… - IEEE Transactions …, 2008 - ieeexplore.ieee.org
Preventing silicon chips from negative, even disastrous thermal hazards has become
increasingly challenging these days; considering thermal effects early in the design cycle is …

Thermal-aware task scheduling in 3D chip multiprocessor with real-time constrained workloads

J Li, M Qiu, JW Niu, LT Yang, Y Zhu… - ACM Transactions on …, 2013 - dl.acm.org
Chip multiprocessor (CMP) techniques have been implemented in embedded systems due
to tremendous computation requirements. Three-dimension (3D) CMP architecture has been …

Thermal monitoring mechanisms for chip multiprocessors

J Long, SO Memik, G Memik, R Mukherjee - ACM Transactions on …, 2008 - dl.acm.org
With large-scale integration and increasing power densities, thermal management has
become an important tool to maintain performance and reliability in modern process …