An abstract semantics of speculative execution for reasoning about security vulnerabilities
Abstract Reasoning about correctness and security of software is increasingly difficult due to
the complexity of modern microarchitectural features such as out-of-order execution. A class …
the complexity of modern microarchitectural features such as out-of-order execution. A class …
A Maude framework for cache coherent multicore architectures
On shared memory multicore architectures, cache memory is used to accelerate program
execution by providing quick access to recently used data, but enables multiple copies of …
execution by providing quick access to recently used data, but enables multiple copies of …
[HTML][HTML] A formal model of data access for multicore architectures with multilevel caches
The performance of software running on parallel or distributed architectures can be severely
affected by the location of data. In shared memory multicore architectures, data movement …
affected by the location of data. In shared memory multicore architectures, data movement …
A formal model of parallel execution on multicore architectures with multilevel caches
The performance of software running on parallel or distributed architectures can be severely
affected by the location of data. On shared memory multicore architectures, data movement …
affected by the location of data. On shared memory multicore architectures, data movement …
Prototyping formal system models with active objects
E Kamburjan, R Hähnle - arXiv preprint arXiv:1810.02470, 2018 - arxiv.org
We propose active object languages as a development tool for formal system models of
distributed systems. Additionally to a formalization based on a term rewriting system, we use …
distributed systems. Additionally to a formalization based on a term rewriting system, we use …
Ensuring memory consistency in heterogeneous systems based on access mode declarations
Running a program on disjoint memory spaces requires to address memory consistency
issues and to perform transfers so that the program always accesses the right data. Several …
issues and to perform transfers so that the program always accesses the right data. Several …
Leveraging access mode declarations in a model for memory consistency in heterogeneous systems
On a system that exposes disjoint memory spaces to the software, a program has to address
memory consistency issues and perform data transfers so that it always accesses valid data …
memory consistency issues and perform data transfers so that it always accesses valid data …
[PDF][PDF] An Operational Framework for Multilevel Cache Coherent Multicore Architectures⇤
Multicore architectures are gaining popularity in today's hardware design. Applications that
are deployed on these architectures are expected to scale and perform better by using the …
are deployed on these architectures are expected to scale and perform better by using the …
Towards Enabling Low-Level Memory Optimisations at the High-Level with Ownership Annotations
In modern architectures, due to the huge gap between CPU performance and memory
bandwidth, an application's performance highly depends on the speed at which the system …
bandwidth, an application's performance highly depends on the speed at which the system …
[PDF][PDF] Towards Enabling Low-Level Memory Optimisations at the High-Level with Ownership-like Annotations
In modern architectures, due to the huge gap between CPU performance and memory
bandwidth, an application's performance highly depends on the speed at which the system …
bandwidth, an application's performance highly depends on the speed at which the system …