We present results for several light hadronic quantities (f π, f K, BK, mud, ms, t 0 1/2, w 0)
obtained from simulations of 2+ 1 flavor domain wall lattice QCD with large physical volumes …

Innovations in hardware architecture, such as hyper-threading or multicore processors,
make parallel computing resources available for computer systems in different areas …

For low bit rate speech coding applications, it is important to quantize the LPC parameters
accurately using as few bits as possible. Though vector quantizers are more efficient than …

Precise calculation of molecular electronic wavefunctions by methods such as coupled-
cluster requires the computation of tensor contractions, the cost of which has polynomial …

The development that quantum computing technologies are achieving is beginning to attract
the interest of companies that could potentially be users of quantum software. Thus, it is …

This paper describes an end-to-end system implementation of the transactional memory
(TM) programming model on top of the hardware transactional memory (HTM) of the Blue …

Increased system size and a greater reliance on utilizing system parallelism to achieve
computational needs, requires innovative system architectures to meet the simulation …

We present the introduction of transactional memory into the next generation IBM System z
CPU. We first describe the instruction-set architecture features, including requirements for …

Data prefetching, ie, the act of predicting an application's future memory accesses and
fetching those that are not in the on-chip caches, is a well-known and widely used approach …

In the late 1990s, powerful economic forces led to the adoption of commodity desktop
processors in high-performance computing. This transformation has been so effective that …