High efficiency power amplifier architectures for RF applications
T Yu, A Madisetti - US Patent 10,367,522, 2019 - Google Patents
A parallel delta sigma modulator architecture is disclosed. The parallel delta sigma
modulator architecture includes a signal demultiplexer configured to receive an input signal …
modulator architecture includes a signal demultiplexer configured to receive an input signal …
Systems and methods for digital synthesis of output signals using resonators
T Yu, A Madisetti - US Patent 10,812,087, 2020 - Google Patents
Abstract Systems and methods for digital synthesis of an output signal using a frequency
generated from a resonator and computing amplitude values that take into account …
generated from a resonator and computing amplitude values that take into account …
Systems and methods for digital synthesis of output signals using resonators
T Yu, A Madisetti - US Patent 10,530,372, 2020 - Google Patents
Systems and methods for digital synthesis of an output signal using a frequency generated
from a resonator and computing amplitude values that take into account temperature …
from a resonator and computing amplitude values that take into account temperature …
Systems and methods for fast delta sigma modulation using parallel path feedback loops
T Yu, A Madisetti - US Patent 10,020,818, 2018 - Google Patents
An error feedback system for a delta sigma modulator is disclosed. The error feedback
system has an error transfer function where at least k− 1 coefficients are set to zero. This …
system has an error transfer function where at least k− 1 coefficients are set to zero. This …
Systems and methods for digital signal chirp generation using frequency multipliers
T Yu, A Madisetti - US Patent 12,123,968, 2024 - Google Patents
Abstract Systems and methods for digitally synthesizing chirp signal in a low intermediate
frequency (IF) band and using frequency multipliers to generate a higher frequency signal …
frequency (IF) band and using frequency multipliers to generate a higher frequency signal …
Systems and methods for digital synthesis of output signals using resonators
T Yu, A Madisetti - US Patent 11,258,448, 2022 - Google Patents
US11258448B2 - Systems and methods for digital synthesis of output signals using resonators
- Google Patents US11258448B2 - Systems and methods for digital synthesis of output signals …
- Google Patents US11258448B2 - Systems and methods for digital synthesis of output signals …
Correction method and correction circuit for sigma-delta modulator
CL Chen, JF Lai, YC Chen, SH Huang - US Patent 10,778,244, 2020 - Google Patents
A correction method and a correction circuit for a sigma-delta modulator (SDM) are provided.
The SDM includes a loop filter, a quantizer, and a digital-to-analog converter (DAC). The …
The SDM includes a loop filter, a quantizer, and a digital-to-analog converter (DAC). The …
Sigma-delta analog-to-digital converter capable of reducing idle tones while alternately conducting signal conversion and comparator offset calibration
CC Wang - US Patent 10,998,916, 2021 - Google Patents
A sigma-delta analog-to-digital converter includes: a subtractor for subtracting a feedback
signal from an analog input signal; a loop filter for processing the output signal from the …
signal from an analog input signal; a loop filter for processing the output signal from the …
Systems and methods for synthesis of modulated RF signals
T Yu, A Madisetti - US Patent 11,933,919, 2024 - Google Patents
Abstract Systems and methods for synthesis of a modulated RF signal using a variety of
modulation schemes are described. An embodiment includes a direct frequency synthesizer …
modulation schemes are described. An embodiment includes a direct frequency synthesizer …
High performance feedback loop with delay compensation
R Ivry - US Patent 11,967,963, 2024 - Google Patents
Abstract An Integrated Circuit (IC) includes feedback control-loop (FCL) circuitry to generate
a delay-compensated output signal responsively to an input reference signal. The FCL …
a delay-compensated output signal responsively to an input reference signal. The FCL …