HPR-Mul: An Area and Energy-Efficient High-Precision Redundancy Multiplier by Approximate Computing
J Vafaei, O Akbari - IEEE Transactions on Very Large Scale …, 2024 - ieeexplore.ieee.org
For critical applications that require a higher level of reliability, the triple modular
redundancy (TMR) scheme is usually employed to implement fault-tolerant arithmetic units …
redundancy (TMR) scheme is usually employed to implement fault-tolerant arithmetic units …
Analyzing reduced precision triple modular redundancy under proton irradiation
LA Garcia-Astudillo, L Entrena… - … on Nuclear Science, 2022 - ieeexplore.ieee.org
This work analyzes the performance of the reduced precision redundancy (RPR) error
mitigation technique using the fast Fourier transform (FFT) as a case study. To this purpose …
mitigation technique using the fast Fourier transform (FFT) as a case study. To this purpose …
Reduced resolution redundancy: A novel approximate error mitigation technique
LA García-Astudillo, L Entrena, A Lindoso… - IEEE Access, 2022 - ieeexplore.ieee.org
Error mitigation techniques, such as Triple Modular Redundancy, introduce very large
overheads. To alleviate this overhead, approximate techniques can be used. In this work we …
overheads. To alleviate this overhead, approximate techniques can be used. In this work we …
Analyzing scaled reduced precision redundancy for error mitigation under proton irradiation
LA García-Astudillo, A Lindoso… - … on Nuclear Science, 2022 - ieeexplore.ieee.org
Reduced precision redundancy (RPR) is an alternative to triple modular redundancy (TMR)
that reduces the area overhead at the expense of minor accuracy loss in case of error. In this …
that reduces the area overhead at the expense of minor accuracy loss in case of error. In this …
Four Reduced Precision Redundancy by Approximation (4RPA): Design and Analysis of 4-Module Systems
S Junsangsri, F Lombardi - IEEE Transactions on Reliability, 2024 - ieeexplore.ieee.org
Reduced precision redundancy (RPR) has been widely used as an alternative to triple
modular redundancy to enhance reliable computing with tolerance to errors and faults; …
modular redundancy to enhance reliable computing with tolerance to errors and faults; …
Fault Tolerance in Triplet Network Training: Analysis, Evaluation and Protection Methods
Z Wang, F Niknia, S Liu, P Reviriego… - … on Emerging Topics …, 2024 - ieeexplore.ieee.org
This paper investigates the tolerance of Triplet Networks (TNs) with a focus on faults in the
training process. For compatibility with the existing literature. So-called stuck-at faults of a …
training process. For compatibility with the existing literature. So-called stuck-at faults of a …
Error Mitigation Using Optimized Redundancy for Composite Algorithms in FPGAs
LA Garcia-Astudillo, A Lindoso… - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
Error mitigation techniques have become mandatory in aerospace applications to cope with
soft errors. Approximate error mitigation techniques are an attractive solution to reduce the …
soft errors. Approximate error mitigation techniques are an attractive solution to reduce the …
Evaluation of a reduced precision redundancy FFT design
LA Garcia-Astudillo, A Lindoso… - … XXXV Conference on …, 2020 - ieeexplore.ieee.org
Fault-tolerant designs for space applications on SRAM-based FPGAs typically require
Distributed Triple Modular Redundancy (DTMR) or Block Triple Modular Redundancy …
Distributed Triple Modular Redundancy (DTMR) or Block Triple Modular Redundancy …
Probabilistic approximate computing at nanoscales: From data structures to memories
S Liu, P Reviriego, P Junsangsri… - IEEE Nanotechnology …, 2021 - ieeexplore.ieee.org
The slowdown of CMOS technology scaling has placed architectures and algorithms on
focus for future performance improvements in nanoscale computing systems. Two promising …
focus for future performance improvements in nanoscale computing systems. Two promising …
Design of a fault tolerant RISC-V instruction execute stage for safety critical applications
L Fiore - 2021 - webthesis.biblio.polito.it
Combining performances, power consumption and fault tolerance in modern integrated
circuits is a real challenge. The goal of this work is to present a possible technique to detect …
circuits is a real challenge. The goal of this work is to present a possible technique to detect …