[PDF][PDF] Design and analysis of a novel low-power SRAM bit-cell structure at deep-sub-micron CMOS technology for mobile multimedia applications
NK Shukla, RK Singh, M Pattanaik - International Journal of Advanced, 2011 - Citeseer
The growing demand for high density VLSI circuits and the exponential dependency of the
leakage current on the oxide thickness is becoming a major challenge in deep-submicron …
leakage current on the oxide thickness is becoming a major challenge in deep-submicron …
Column address selection in optical RAMs with positive and negative logic row access
C Vagionas, S Markou, G Dabos… - IEEE Photonics …, 2013 - ieeexplore.ieee.org
An optical RAM row access gate followed by a column address selector for wavelength-
division-multiplexing (WDM)-formatted words employing a single semiconductor optical …
division-multiplexing (WDM)-formatted words employing a single semiconductor optical …
[PDF][PDF] A novel approach to reduce the gate and sub-threshold leakage in a conventional SRAM bit-cell structure at deep-sub micron CMOS technology
NK Shukla, RK Singh, M Pattanaik - International Journal of Computer …, 2011 - Citeseer
In the age of scaled silicon technology to improve the functional efficiency of a CMOS
design, the device geometry and device parameters are constantly scaled. The major factors …
design, the device geometry and device parameters are constantly scaled. The major factors …
[PDF][PDF] Analysis of the effect of temperature variations on sub-threshold leakage current in P3 and P4 SRAM cells at deep sub-micron CMOS technology
R Singh, P Bhatnagar, D Sahu… - International Journal of …, 2011 - researchgate.net
With ever increasing power density and temperature variations within high density VLSI
chips, it is very important to study the temperature effects on the devices in a compact way …
chips, it is very important to study the temperature effects on the devices in a compact way …
A 10-t sram cell with inbuilt charge sharing for dynamic power reduction
S Jain, K Santhosh, M Pattanaik… - … Conference on Advances …, 2013 - ieeexplore.ieee.org
In this paper we present a novel 10T SRAM cell design with an inbuilt mechanism for charge
recycling to cut down the dynamic power budget. The read discharge power of a single …
recycling to cut down the dynamic power budget. The read discharge power of a single …
Design of low leakage SRAM bit-cell and array
S Ranganath, MS Bhat… - … Conference on Circuits …, 2014 - ieeexplore.ieee.org
There is an ever increasing need for running various multimedia and computer based
applications on a variety of popular digital systems. These applications continue to become …
applications on a variety of popular digital systems. These applications continue to become …
Analysis of leakage current and leakage power reduction during write operation in CMOS SRAM cell
K Khare, R Kar, D Mandal… - … on Communication and …, 2014 - ieeexplore.ieee.org
Leakage power is a major issue for short channel devices. As the technology is shrinking (ie,
180nm, 90nm, 45nm. etc.) the leakage current is increasing very fast. So, several methods …
180nm, 90nm, 45nm. etc.) the leakage current is increasing very fast. So, several methods …
7-T single end and 8-T differential dual-port SRAM memory cells
B Kankanala, A Srinivasulu… - 2013 IEEE Conference on …, 2013 - ieeexplore.ieee.org
The advantages of simultaneous read and write operations for dual-port SRAM memory
cells are well known. In this paper two configurations of dual-port 8-Transistor Differential …
cells are well known. In this paper two configurations of dual-port 8-Transistor Differential …
[PDF][PDF] Simulation and analysis of 6t sram cell using power reduction techniques
The demand for static random-access memory (SRAM) is increasing with large use of SRAM
in System On-Chip and high-performance VLSI circuits. The high-density VLSI circuits and …
in System On-Chip and high-performance VLSI circuits. The high-density VLSI circuits and …
Optical RAM row access with WDM-enabled all-passive row/column decoders
T Alexoudi, S Papaioannou… - IEEE Photonics …, 2014 - ieeexplore.ieee.org
In this letter, we present new architectural perspectives in optical static RAM configurations
by exploiting the wavelength dimension in address domain. We present a 2× 4 optical RAM …
by exploiting the wavelength dimension in address domain. We present a 2× 4 optical RAM …