A survey of coarse-grained reconfigurable architecture and design: Taxonomy, challenges, and applications

L Liu, J Zhu, Z Li, Y Lu, Y Deng, J Han, S Yin… - ACM Computing …, 2019 - dl.acm.org
As general-purpose processors have hit the power wall and chip fabrication cost escalates
alarmingly, coarse-grained reconfigurable architectures (CGRAs) are attracting increasing …

Modern development methods and tools for embedded reconfigurable systems: A survey

L Jóźwiak, N Nedjah, M Figueroa - Integration, 2010 - Elsevier
Heterogeneous reconfigurable systems provide drastically higher performance and lower
power consumption than traditional CPU-centric systems. Moreover, they do it at much lower …

ADRES: An architecture with tightly coupled VLIW processor and coarse-grained reconfigurable matrix

B Mei, S Vernalde, D Verkest, H De Man… - … Logic and Application …, 2003 - Springer
The coarse-grained reconfigurable architectures have advantages over the traditional
FPGAs in terms of delay, area and configuration time. To execute entire applications, most of …

[图书][B] Reconfigurable computing: the theory and practice of FPGA-based computation

S Hauck, A DeHon - 2010 - books.google.com
Reconfigurable Computing marks a revolutionary and hot topic that bridges the gap
between the separate worlds of hardware and software design—the key feature of …

Dsagen: Synthesizing programmable spatial accelerators

J Weng, S Liu, V Dadu, Z Wang, P Shah… - 2020 ACM/IEEE 47th …, 2020 - ieeexplore.ieee.org
Domain-specific hardware accelerators can provide orders of magnitude speedup and
energy efficiency over general purpose processors. However, they require extensive manual …

HyCUBE: A CGRA with reconfigurable single-cycle multi-hop interconnect

M Karunaratne, AK Mohite, T Mitra, LS Peh - Proceedings of the 54th …, 2017 - dl.acm.org
CGRAs are promising as accelerators due to their improved energy-efficiency compared to
FPGAs. Existing CGRAs support reconfigurability for operations, but not communications …

Scalable and programmable neural network inference accelerator based on in-memory computing

H Jia, M Ozatay, Y Tang, H Valavi… - IEEE Journal of Solid …, 2021 - ieeexplore.ieee.org
This work demonstrates a programmable in-memory-computing (IMC) inference accelerator
for scalable execution of neural network (NN) models, leveraging a high-signal-to-noise …

[图书][B] Handbook of signal processing systems

SS Bhattacharyya, EF Deprettere, R Leupers, J Takala - 2013 - Springer
In this new edition of the Handbook of Signal Processing Systems, many of the chapters
from the previous editions have been updated, and several new chapters have been added …

Sara: Scaling a reconfigurable dataflow accelerator

Y Zhang, N Zhang, T Zhao, M Vilim… - 2021 ACM/IEEE 48th …, 2021 - ieeexplore.ieee.org
The need for speed in modern data-intensive work-loads and the rise of" dark silicon" in the
semiconductor industry are pushing for larger, faster, and more energy and area-efficient …

Edge-centric modulo scheduling for coarse-grained reconfigurable architectures

H Park, K Fan, SA Mahlke, T Oh, H Kim… - Proceedings of the 17th …, 2008 - dl.acm.org
Coarse-grained reconfigurable architectures (CGRAs) present an appealing hardware
platform by providing the potential for high computation throughput, scalability, low cost, and …