A survey of SRAM-based in-memory computing techniques and applications
As von Neumann computing architectures become increasingly constrained by data-
movement overheads, researchers have started exploring in-memory computing (IMC) …
movement overheads, researchers have started exploring in-memory computing (IMC) …
Hardware designs for security in ultra-low-power IoT systems: An overview and survey
The development of ultra-low-power (ULP) electronic devices has opened up opportunities
for disruptive systems like the Internet of Things (IoT). The main concern is the security and …
for disruptive systems like the Internet of Things (IoT). The main concern is the security and …
A 64-tile 2.4-Mb in-memory-computing CNN accelerator employing charge-domain compute
Large-scale matrix-vector multiplications, which dominate in deep neural networks (DNNs),
are limited by data movement in modern VLSI technologies. This paper addresses data …
are limited by data movement in modern VLSI technologies. This paper addresses data …
14.2 A compute SRAM with bit-serial integer/floating-point operations for programmable in-memory vector acceleration
Data movement and memory bandwidth are dominant factors in the energy and
performance of both general purpose CPUs and GPUs. This has led to extensive research …
performance of both general purpose CPUs and GPUs. This has led to extensive research …
Recryptor: A reconfigurable cryptographic cortex-M0 processor with in-memory and near-memory computing for IoT security
Providing security for the Internet of Things (IoT) is increasingly important, but supporting
many different cryptographic algorithms and standards within the physical constraints of IoT …
many different cryptographic algorithms and standards within the physical constraints of IoT …
Trends in hardware security: From basics to ASICs
M Alioto - IEEE Solid-State Circuits Magazine, 2019 - ieeexplore.ieee.org
This article presents an excerpt of the tutorial on hardware security delivered at the 2019
IEEE International Solid-State Circuits Conference and an introduction to a performance …
IEEE International Solid-State Circuits Conference and an introduction to a performance …
A 4 + 2T SRAM for Searching and In-Memory Computing With 0.3-V
This paper presents a 4+ 2T SRAM for embedded searching and in-memory-computing
applications. The proposed SRAM cell uses the n-well as the write wordline to perform write …
applications. The proposed SRAM cell uses the n-well as the write wordline to perform write …
An energy-efficient reconfigurable DTLS cryptographic engine for securing Internet-of-Things applications
U Banerjee, A Wright, C Juvekar… - IEEE Journal of Solid …, 2019 - ieeexplore.ieee.org
This paper presents the first hardware implementation of the datagram transport layer
security (DTLS) protocol to enable end-to-end security for the Internet of Things (IoT). A key …
security (DTLS) protocol to enable end-to-end security for the Internet of Things (IoT). A key …
MeNTT: A compact and efficient processing-in-memory number theoretic transform (NTT) accelerator
Lattice-based cryptography (LBC), exploiting learning with error (LWE) problems, is a
promising candidate for postquantum cryptography. The number theoretic transform (NTT) is …
promising candidate for postquantum cryptography. The number theoretic transform (NTT) is …
An energy-efficient reconfigurable DTLS cryptographic engine for End-to-End security in iot applications
U Banerjee, C Juvekar, A Wright… - … Solid-State Circuits …, 2018 - ieeexplore.ieee.org
End-to-end security protocols, like Datagram Transport Layer Security (DTLS)[1], enable the
establishment of mutually authenticated confidential channels between edge nodes and the …
establishment of mutually authenticated confidential channels between edge nodes and the …