US7304354B2 - Buried guard ring and radiation hardened isolation structures and
fabrication methods - Google Patents US7304354B2 - Buried guard ring and radiation …

(58) Field of Classification Search.................. 257/371, Semiconductor devices can be
fabricated using conventional 257/372, 376, 409,921, E29, 063, E29. 064; designs and …

GB 2314973. A 1, 1998 JP 57-143843. A 9, 1982 JP 1986.24067. 1 10, 1986 JP 62-250671
A 10, 1987 JP O1-265555 A 10, 1989 JP 19892.73346 11, 1989 JP 04-003920 A 1, 1991 JP …

Semiconductor devices can be fabricated using conventional designs and process but
including specialized structures to reduce or eliminate detrimental effects caused by various …

(57) ABSTRACT A low electrical and thermal resistance FinFET device includes a
semiconductor body, a fin body on the substrate wafer, an isolation structure forming a fin …

CMOS latch-up has historically been a problem in bulk CMOS processes through a parasitic
pnpn structure formed by parasitic pnp and npn bipolar transistors. In application systems …

Semiconductor devices can be fabricated using conventional designs and process but
including specialized structures to reduce or eliminate detrimental effects caused by various …

CMOS latchup can be initiated in semiconductor chips from minority carrier injection
sources. Injection sources occur from both circuit, chip and system level phenomena as well …

This paper will first focus on the theory of guard rings and the importance of understanding
for internal and external latchup. This will be followed by electrical characterization and the …

In advanced CMOS, RF CMOS, and RF BiCMOS, structures which allow the separation of
the p-well from the low doped p-substrate to form an" isolated MOSFET" are advantageous; …