The invention provides a System and method for resolving ambiguous invalidate messages
received by an entity of a computer System. An invalidate message is considered …

A method and system of expediting issuance of a second request of a pair of ordered
requests into a distributed coherent communication fabric. The first request of the ordered …

US6721813B2 - Computer system implementing a system and method for tracking the progress
of posted write transactions - Google Patents US6721813B2 - Computer system implementing …

(57) ABSTRACT A messaging Scheme that accomplishes cache-coherent data transferS
during a memory read operation in a multiproceSS ing computer System is described. A …

A context-selection mechanism is provided for selecting a best context from a pool of
contexts for processing a data packet. The context selection mechanism comprises, an …

A first node includes a first cache and a plurality of coherent agents. In response to a
transaction to a coherency block by a first coherent agent of the plurality of coherent agents …

A system comprises a plurality of nodes, each node comprising one or more coherent
agents coupled to an interconnect. Ownership of a coherency block accessed by a …

(57) ABSTRACT A data processing System 2 is described including a cache memory 8 and
a plurality of DRAM banks 16, 18, 20, 22. A victim select circuit 32 within a cache controller …

A computer System may include multiple processing nodes, one or more of which may be
coupled to Separate memories which may form a distributed memory System. The process …

4. 300 memory, deciding exactly where to place the data structure in memory, performing all
data transfers between the outside device and the memory, and maintaining the memory …