A new design approach of dopingless tunnel FET for enhancement of device characteristics

BR Raad, S Tirkey, D Sharma… - IEEE Transactions on …, 2017 - ieeexplore.ieee.org
Formation of abrupt tunneling junction for the sub-nanometer tunnel FET (TFET) is crucial for
achieving better electrical behavior. This task is more challenging in the case of dopingless …

A high-performance gate engineered InGaN dopingless tunnel FET

X Duan, J Zhang, S Wang, Y Li, S Xu… - IEEE Transactions on …, 2018 - ieeexplore.ieee.org
A gate engineered InGaN dopingless tunnel FET (DL-TFET) using the charge plasma
concept is proposed and investigated by silvaco Atlas simulation. In 0.75 Ga 0.25 N is a …

Doping and dopingless tunnel field effect transistor

P Singh, DP Samajdar… - 2021 6th International …, 2021 - ieeexplore.ieee.org
For Low power consumption, an emerging device that depends on lowering the supply
voltage with downscaling is proposed which is known as the Tunnel-FET (TFET). In general …

Interfacial trap charge and self-heating effect based reliability analysis of a Dual-Drain Vertical Tunnel FET

D Das, CK Pandey - Microelectronics Reliability, 2023 - Elsevier
This manuscript exclusively addresses the reliability concern of a double-drain vertical TFET
(DD-VTFET) by analysing the influence of interface trap charges and variation in ambient …

Simulation study on ferroelectric layer thickness dependence RF/Analog and linearity parameters in ferroelectric tunnel junction TFET

R Saha - Microelectronics Journal, 2021 - Elsevier
In this paper, the impact of ferroelectric layer thickness (t FE) on input drain current
characteristic is reported in ferroelectric tunnel junction (FTJ) TFET through TCAD simulator …

Impact of work function variation for enhanced electrostatic control with suppressed ambipolar behavior for dual gate L-TFET

P Singh, DS Yadav - Current Applied Physics, 2022 - Elsevier
The favorable electrostatic potential and tunneling underneath the overall gate region, which
prevents legitimate source to drain tunneling, controllability over the gate is assisted in …

Effect of interface trap charges on performance variation of heterogeneous gate dielectric junctionless-TFET

S Gupta, K Nigam, S Pandey, D Sharma… - … on Electron Devices, 2017 - ieeexplore.ieee.org
In this paper, we investigate the effect of interface trap charges on the variation of
heterogeneous gate dielectric junctionless-tunnel FET (JL-TFET) by introducing both donor …

Design and Investigation of Charge-Plasma-Based Work Function Engineered Dual-Metal-Heterogeneous Gate Si-Si0.55Ge0.45 GAA-Cylindrical NWTFET for …

N Kumar, A Raman - IEEE Transactions on Electron Devices, 2019 - ieeexplore.ieee.org
In this paper, we have proposed dopingless gate all around (GAA) nanowire tunnel field-
effect transistor (NWTFET) made up of dual-material channel (DMaC). Charge-plasma (CP) …

Impact of band gap and gate dielectric engineering on novel Si0. 1Ge0. 9-GaAs lateral N-type charge plasma based JLTFET

K Kumar, SC Sharma - Microelectronics Journal, 2022 - Elsevier
In this research article, a device called dual dielectric gate hetero-material junctionless TFET
(DD-HJLTFET) is proposed using a novel amalgamation of Si 0.1 Ge 0.9/GaAs for the first …

Gate engineered heterostructure junctionless TFET with Gaussian doping profile for ambipolar suppression and electrical performance improvement

H Aghandeh, SAS Ziabari - Superlattices and Microstructures, 2017 - Elsevier
This study investigates a junctionless tunnel field-effect transistor with a dual material gate
and a heterostructure channel/source interface (DMG-H-JLTFET). We find that using the …