Prometheus: scalable and accurate emulation of task-based applications on many-core systems

G Kestor, R Gioiosa… - 2015 IEEE international …, 2015 - ieeexplore.ieee.org
Modeling the performance of non-deterministic parallel applications on future many-core
systems requires the development of novel simulation and emulation techniques and tools …

A very fast trace-driven simulation platform for chip-multiprocessors architectural explorations

MES Elrabaa, A Hroub, MF Mudawar… - … on Parallel and …, 2017 - ieeexplore.ieee.org
Simulation is the main tool for computer architects and parallel application developers for
developing new architectures and parallel algorithms on many-core machines. Simulating a …

Energy optimization for large-scale 3D manycores in the dark-silicon era

S Majzoub, RA Saleh, I Ashraf, M Taouil… - IEEE …, 2019 - ieeexplore.ieee.org
In this paper, we study the impact of the idle/dynamic power consumption ratio on the
effectiveness of a multi-V dd/frequency manycore design. We propose a new tool called …

[PDF][PDF] Heuristiclab hive-an open source environment for parallel and distributed execution of heuristic optimization algorithms

A Scheibenpflug, S Wagner, G Kronberger… - … conference on the …, 2012 - researchgate.net
Metaheuristics are a group of algorithms that are often applied on hard optimization
problems and usually require much CPU time in order to find satisfying solutions …

[图书][B] XMTSim: A simulator of the XMT many-core architecture

F Keceli, U Vishkin - 2011 - academia.edu
This paper documents the features and the design of XMTSim, the cycle-accurate simulator
of the Explicit Multi-Threading (XMT) computer architecture. The Explicit Multi-Threading …

A lazy divide and conquer approach to constraint solving

S Anand, WN Chin, SC Khoo - 14th IEEE International …, 2002 - ieeexplore.ieee.org
A divide and conquer strategy enables a problem to be divided into subproblems, which are
solved independently and later combined to form solutions of the original problem. For …

Modeling and simulation of a many-core architecture using systemC

AR Silva, W José, H Neto, M Véstias - Procedia Technology, 2014 - Elsevier
Transistor density has made possible the design of massively parallel architectures with
hundreds of cores on a single chip. De-signing efficient architectures with such high number …

Programming Environment, Run-Time System and Simulator for Many-Core Machines

O Certner - 2010 - theses.hal.science
Since 2005, chip manufacturers have stopped raising processor frequencies, which had
been the primary mean to increase computer processing power since the end of the 90s …

[PDF][PDF] Using SystemC to Simulate a Many-Core Architecture

AR Silvaa, W Joséa, H Netob, M Véstiasc - academia.edu
Transistor density has made possible the design of massively parallel architectures with
hundreds of cores on a single chip. Designing efficient architectures with such high number …

HySim: A Hybrid Software/Hardware Simulation Framework for Early Architectural Exploration of Chip Multiprocessors

AAM Hroub - 2015 - search.proquest.com
Simulation is the de facto tool for computer architecture performance evaluation. It implies
modeling the events of interest in the intended architecture to be evaluated. Traditionally …