3D chip-stacking technology with through-silicon vias and low-volume lead-free interconnections
K Sakuma, PS Andry, CK Tsang… - IBM Journal of …, 2008 - ieeexplore.ieee.org
Three-dimensional (3D) integration using through-silicon vias (TSVs) and low-volume lead-
free solder interconnects allows the formation of high signal bandwidth, fine pitch, and short …
free solder interconnects allows the formation of high signal bandwidth, fine pitch, and short …
Method and structure for adhesion of intermetallic compound (IMC) on Cu pillar bump
JC Lin, CH Yu - US Patent 8,592,995, 2013 - Google Patents
BACKGROUND Flip chip, or Controlled Collapse Chip Connection (C4), is a method for
interconnecting semiconductor devices, such as integrated circuit chips and MEMS, to …
interconnecting semiconductor devices, such as integrated circuit chips and MEMS, to …
Wafer-level Cu/Sn to Cu/Sn SLID-bonded interconnects with increased strength
H Liu, G Salomonsen, K Wang… - IEEE Transactions …, 2011 - ieeexplore.ieee.org
Wafer level Cu-Sn solid liquid interdiffusion (SLID) bonding of interconnects was achieved
by bonding two-layered Cu/Sn structures to each other. The bonded interconnects were …
by bonding two-layered Cu/Sn structures to each other. The bonded interconnects were …
High-density large-area-array interconnects formed by low-temperature Cu/Sn–Cu bonding for three-dimensional integrated circuits
MR Lueck, JD Reed, CW Gregory… - IEEE transactions on …, 2012 - ieeexplore.ieee.org
High-density area-array 3-D interconnects are a key enabling technology for 3-D integrated
circuits. This paper presents results of the fabrication and testing of large 640 by 512 area …
circuits. This paper presents results of the fabrication and testing of large 640 by 512 area …
Wafer‐Level Solid–Liquid Interdiffusion Bonding
N Hoivik, K Aasmundtveit - Handbook of wafer bonding, 2012 - Wiley Online Library
The SLID process makes use of a two-metal system, one metal having a high melting point
(Mh) and the other having a low melting point (Ml). The melting points are designated TH …
(Mh) and the other having a low melting point (Ml). The melting points are designated TH …
High density interconnect at 10µm pitch with mechanically keyed Cu/Sn-Cu and Cu-Cu bonding for 3-D integration
The results of bonding and stress testing of Cu/Sn-Cu bonded dice and Cu-Cu
thermocompression bonded dice at 10μm and 15μm pitch in large area arrays are shown …
thermocompression bonded dice at 10μm and 15μm pitch in large area arrays are shown …
High density Cu-Cu interconnect bonding for 3-D integration
The demand for more complex and multifunctional microsystems with enhanced
performance characteristics is driving the electronics industry toward the use of best-of …
performance characteristics is driving the electronics industry toward the use of best-of …
High density metal–metal interconnect bonding for 3-D integration
3-D integration provides a pathway to achieve high performance microsystems through
bonding and interconnection of best-of-breed materials and devices. Bonding of device …
bonding and interconnection of best-of-breed materials and devices. Bonding of device …
Bubble formation and growth during Transient Liquid Phase Bonding in Cu/SnAg system for microelectronic packaging
EM Barik, C Gillot, F Hodaj - Journal of Materials Science: Materials in …, 2022 - Springer
In this work, we study the Transient Liquid Phase Bonding (TLPB) for flip chip interconnexion
using copper pillar and SnAg solder alloy technologies. Cu and SnAg bumps with a size of …
using copper pillar and SnAg solder alloy technologies. Cu and SnAg bumps with a size of …
[PDF][PDF] 面向三维集成应用的Cu/SiO2 晶圆级混合键合技术研究进展
刘逸群， 张宏伟， 戴风伟 - 微电子学, 2022 - researching.cn
Cu/SiO2 混合键合技术被认为是实现芯片三维集成和高密度电学互连的理想方案,
但由于其需兼顾介质和金属两种材料的键合, 目前鲜有自主开发且工艺简单 …
但由于其需兼顾介质和金属两种材料的键合, 目前鲜有自主开发且工艺简单 …