Reliability-aware synthesis of combinational logic with minimal performance penalty
DB Limbrick, NN Mahatme… - … on nuclear science, 2013 - ieeexplore.ieee.org
Strategies to mitigate soft errors in combinational logic have resulted in large performance
penalties and increases in design time. This study alleviates these issues by using standard …
penalties and increases in design time. This study alleviates these issues by using standard …
[PDF][PDF] 基于时序优先的电路容错混合加固方案
黄正峰， 陈凡， 蒋翠云， 梁华国 - 电子与信息学报, 2014 - edit.jeit.ac.cn
为了有效降低容忍软错误设计的硬件和时序开销, 该文提出一种时序优先的电路容错混合加固
方案. 该方案使用两阶段加固策略, 综合运用触发器替换和复制门法. 第1 阶段 …
方案. 该方案使用两阶段加固策略, 综合运用触发器替换和复制门法. 第1 阶段 …
Single-event multiple-transient characterization and mitigation via alternative standard cell placement methods
As fabrication technology scales towards smaller transistor sizes and lower critical charge,
single-event radiation effects are more likely to cause errant behavior in multiple, physically …
single-event radiation effects are more likely to cause errant behavior in multiple, physically …
SET and noise fault tolerant circuit design techniques: Application to 7 nm FinFET
In the near future of high component density and low-power technologies, soft errors
occurring not only in memory systems and latches but also in the combinational parts of …
occurring not only in memory systems and latches but also in the combinational parts of …
Model and analysis of single event transient sensitivity based on uncertainty quantification
B Liu, L Cai - Microprocessors and Microsystems, 2022 - Elsevier
Since there are many uncertain factors in the generation and propagation of single event
transient (SET), it is a very important issue that how to quantify the impact of these uncertain …
transient (SET), it is a very important issue that how to quantify the impact of these uncertain …
A Soft-Error Mitigation Approach Using Pulse Quenching Enhancement at Detailed Placement for Combinational Circuits
As technology continuously shrinks, radiation-induced soft errors have become a great
threat to the circuit reliability. Among all the causes, the Single-Event Transient (SET) effect …
threat to the circuit reliability. Among all the causes, the Single-Event Transient (SET) effect …
Leveraging Design Gaps to Attain Zero-Chip-Area Penalty in Digital Space Electronics via Selective Radiation Hardening
J Aravind - 2024 - search.proquest.com
As technology progresses, there'sa notable trend toward miniaturizing electronic
components, like transistors, for space applications. This scaling-down process involves …
components, like transistors, for space applications. This scaling-down process involves …
Research on multi-objective optimization of radiation hardened integrated circuits based on “BP NSGA-III” optimization architecture
H Huang, Y Li, L Wang, C Liu… - 2023 5th International …, 2023 - ieeexplore.ieee.org
In this paper, Single event transient (SET) shielding is reinforced by reinforcing the Flip-flop
(FF), and the FF is preprocessed according to the path timing and soft error (SER) sensitivity …
(FF), and the FF is preprocessed according to the path timing and soft error (SER) sensitivity …
Transient Fault Detection and Recovery Mechanisms in μC/OS-II
In avionics, satellites are widely used in meteorology, navigation and investigation. Satellites
in space, however, are subject to radiation that causes transient fault. This often leads to …
in space, however, are subject to radiation that causes transient fault. This often leads to …
[图书][B] Single-Event Multiple-Transient Characterization and Mitigation via Standard Cell Placement Methods
BT Kiddie - 2016 - search.proquest.com
Summary......................................................................................................................... 18 III.
FUNDAMENTALS OF EDA AND PHYSICAL DESIGN.............................................. 19 Logic …
FUNDAMENTALS OF EDA AND PHYSICAL DESIGN.............................................. 19 Logic …