After two decades of intensive development, 3-D integration has proven invaluable for
allowing integrated circuits to adhere to Moore's Law without needing to continuously shrink …

Nanochannel devices have been fabricated using standard micromachining techniques
such as optical lithography, deposition and etching. 1D nanochannels with thin glass …

This paper presents a novel technology for the implementation of substrate-integrated
waveguide (SIW) structures, based on a paper substrate and realized by an inkjet-printing …

This paper reports on fabrication and design considerations of an integrated folded shorted-
patch chip-size antenna for applications in short-range wireless microsystems and operating …

This paper presents a fabrication method to achieve through-wafer interconnects (TWIs) by
etching, filling and grinding in sequence. Based on this method, advanced chip scale …

Copper through wafer interconnects (TWIs) have become a viable solution to providing
interconnectivity between stacked die. In a world where minimizing chip real estate while …

In this paper, we present the design, fabrication process and experimental results of
electroplated metal interconnects buried at the bottom of deep silicon trenches with vertical …

This chapter introduces the critical steps involved in fabricating TSVs and associated
materials. The fabrication steps for TSVs begin with etching of high aspect ratio trenches in …

In this paper, we present the design, fabrication process, and experimental results of an
electroplated metal buried interconnect and through-wafer via technology suitable for …

There is a need for miniaturizing electronic components such as ICs and modules that are
used in portable devices like cellular phones and PDAs. Miniaturization not only results in a …