We present an application of Defect Oriented Testing (DOT) to an industrial mixed signal
device to reduce test time and maintain quality. The device is an automotive IC product with …

Driven by the need of reducing the defective circuits to a minimum, present-day fabrication
technologies require design techniques been complemented by effective test procedures. In …

The detection level of defects in today's mixed-signal ICs lags behind the extremely high
demand of industries such as automotive. This is mainly because analog blocks in these ICs …

In analog fault simulation, the number one challenge is that simulation time could grow
rapidly and become prohibitive as the circuit size becomes large. This paper proposes a …

We present an application of Defect Oriented Testing (DOT 1) to an industrial mixed signal
device to reduce test time and maintain quality. The device is an automotive IC product with …

This paper focuses on the production testing of Memristor Ratioed Logic (MRL) XOR gate.
MRL is a family that uses memristors along with CMOS inverters to design logic gates. The …

A new method is presented to detect catastrophic defects from the signal analysis of
dynamic current consumption waveforms of analog circuits. While other techniques use the …

In this paper, the issue of testing analog MOS current mode circuits for catastrophic open
and short faults has been addressed. A case study based on the 6-transistor transconductor …

Aspects of the invention relate to techniques of defect injection for transistor-level fault
simulation. A circuit element in a circuit netlist of a circuit is first selected for defect injection …

Abstract Signal Transition Graphs (STG) are a formalism for the description of asynchronous
circuit behaviour. In this paper we propose (and justify) a formal semantics of non …