Aspects of this disclosure relate to adjusting a phase of a clock signal provided to a device
based on a feedback signal from the device. The feedback signal can provide phase …

In one aspect an apparatus includes a first phase-locked loop (PLL), a control circuit, a
holdover circuit, and a variable resistor. The first PLL is configured to receive an input clock …

A frequency synthesizer includes a digitally controlled oscillator, a sigma-delta modulation
circuit and a controller. The digitally controlled oscillator is arranged to generate an …

In the PLL circuit including a phase comparator, a charge pump circuit, a loop filter, and a
voltage controlled oscillator, the loop band after the locking can be expanded in such a …

A circuit and method of operation for a circuit of a radio system in which a system time is
divided into symbols, in which a system clock generator is activated in an operating mode …

Aspects of this disclosure relate to adjusting a phase of a clock signal provided to a device
based on a feedback signal from the device. The feedback signal can provide phase …