Optimal redundancy designs for CNFET-based circuits

D Cheng, F Wang, F Gao… - 2014 IEEE 23rd Asian …, 2014 - ieeexplore.ieee.org
Substantial imperfections in carbon nanotube (CNT) field-effect transistors (CNFETs) are
one key obstacle to the demonstration of large-scale CNFET circuits. In this paper, we first …

Optimum Performance of Carbon Nanotube Field-Effect Transistor Based Sense Amplifier D Flip-Flop Circuits

K Swami, R Sharma - Intelligent Computing Techniques for Smart Energy …, 2020 - Springer
The data storage logic circuit consumes a huge amount of power in any semiconductor
memory design. Continuous scaling introduces unreliable memory read/write operations, so …

Optimal Redundancy Design for CMOS and Post-CMOS Technologies

D Cheng - 2015 - search.proquest.com
As CMOS fabrication technology continues to move deeper into nano-scale, circuit's
susceptibility to manufacturing imperfections increases, and the improvements in yield …