[PDF][PDF] Compress: Reducing Area and Latency of Masked Pipelined Circuits.
Masking is an effective countermeasure against side-channel attacks. It replaces every logic
gate in a computation by a gadget that performs the operation over secret sharings of the …
gate in a computation by a gadget that performs the operation over secret sharings of the …
Research Directions for Verifiable Crypto-Physically Secure TEEs
S Bellemare - arXiv preprint arXiv:2410.03183, 2024 - arxiv.org
A niche corner of the Web3 world is increasingly making use of hardware-based Trusted
Execution Environments (TEEs) to build decentralized infrastructure. One of the motivations …
Execution Environments (TEEs) to build decentralized infrastructure. One of the motivations …
Automated generation of masked nonlinear components: From lookup tables to private circuits
Masking is considered to be an essential defense mechanism against side-channel attacks,
but it is challenging to be adopted for hardware cryptographic implementations, especially …
but it is challenging to be adopted for hardware cryptographic implementations, especially …
A New Fast and Side-Channel Resistant AES Hardware Architecture
M Macchetti, H Pelletier, C Groux - 2023 IEEE International …, 2023 - ieeexplore.ieee.org
In this paper we present a novel architecture for a high-speed AES crypto core which is
resistant against first-order side channel attacks; our design combines Boolean masking …
resistant against first-order side channel attacks; our design combines Boolean masking …
Compress: Generate small and fast masked pipelined circuits
Masking is an effective countermeasure against side-channel attacks. It replaces every logic
gate in a computation by a gadget that performs the operation over secret sharings of the …
gate in a computation by a gadget that performs the operation over secret sharings of the …
Prover-Toward More Efficient Formal Verification of Masking in Probing Model
F Zhou, H Chen, L Fan - IACR Transactions on …, 2025 - philosophymindscience.org
In recent years, formal verification has emerged as a crucial method for assessing security
against Side-Channel attacks of masked implementations, owing to its remarkable versatility …
against Side-Channel attacks of masked implementations, owing to its remarkable versatility …
[PDF][PDF] An automated generation tool of hardware masked S-box: AGEMA+.
Masking is considered to be an essential defense mechanism against sidechannel attacks,
but it is challenging to be adopted for hardware cryptographic implementations, especially …
but it is challenging to be adopted for hardware cryptographic implementations, especially …
[PDF][PDF] Preventing differential side-channel attacks in hardware: from generic to specific solutions
C Momin - 2024 - dial.uclouvain.be
Abstract Information security relies on cryptographic algorithms preventing third parties from
diverting systems or knowledge from their intended use. These algorithms, deployed on …
diverting systems or knowledge from their intended use. These algorithms, deployed on …
[PDF][PDF] Composable and efficient masking schemes for side-channel secure implementations.
G Cassiers - 2022 - dial.uclouvain.be
Modern cryptography has been widely deployed in the last decades, allowing any
computing device to secure its communications. Facing the strength of the cryptographic …
computing device to secure its communications. Facing the strength of the cryptographic …
[PDF][PDF] EDA Workflow for Optimization of Robust Model Probing-Compliant Masked Hardware Gadgets
Side-channel analysis poses a threat to securitycritical systems, enabling attackers to exploit
the unintended information leakage. To mitigate its effect, masking serves as a provably …
the unintended information leakage. To mitigate its effect, masking serves as a provably …