Recent developments and design challenges of high-performance ring oscillator CMOS time-to-digital converters

Z Cheng, X Zheng, MJ Deen… - IEEE Transactions on …, 2015 - ieeexplore.ieee.org
Time-to-digital converters (TDCs) are increasingly used as building blocks in biomedical
imaging, digital communication, and measurement instrumentation systems. When …

A 56.4-to-63.4 GHz multi-rate all-digital fractional-N PLL for FMCW radar applications in 65 nm CMOS

W Wu, RB Staszewski, JR Long - IEEE Journal of solid-state …, 2014 - ieeexplore.ieee.org
A mm-wave digital transmitter based on a 60 GHz all-digital phase-locked loop (ADPLL) with
wideband frequency modulation (FM) for FMCW radar applications is proposed. The …

Stochastic electronics: A neuro-inspired design paradigm for integrated circuits

TJ Hamilton, S Afshar, A van Schaik… - Proceedings of the …, 2014 - ieeexplore.ieee.org
As advances in integrated circuit (IC) fabrication technology reduce feature sizes to
dimensions on the order of nanometers, IC designers are facing many of the problems that …

A 0.5-V 1.6-mW 2.4-GHz fractional-N all-digital PLL for Bluetooth LE with PVT-insensitive TDC using switched-capacitor doubler in 28-nm CMOS

N Pourmousavian, FW Kuo… - IEEE Journal of Solid …, 2018 - ieeexplore.ieee.org
This paper proposes an ultra-low-voltage (ULV) fractional-N all-digital PLL (ADPLL)
powered from a single 0.5-V supply. While its digitally controlled oscillator (DCO) runs …

All-digital PLL for Bluetooth low energy using 32.768-kHz reference clock and≤ 0.45-V supply

CC Li, MS Yuan, CC Liao, YT Lin… - IEEE Journal of Solid …, 2018 - ieeexplore.ieee.org
In this paper, we introduce an all-digital phase-locked loop (ADPLL) for Bluetooth low
energy (BLE) that eliminates the need for a crystal oscillator (XO) other than a 32.768-kHz …

A 77-GHz mixed-mode FMCW signal generator based on bang-bang phase detector

J Lin, Z Song, N Qi, W Rhee, Z Wang… - IEEE Journal of Solid …, 2018 - ieeexplore.ieee.org
A 77-GHz frequency-modulated continuous-wave (FMCW) signal generator is presented for
automobile millimeter-wave (mm-wave) radar applications. The reconfigurable chirp is …

A 12mW all-digital PLL based on class-F DCO for 4G phones in 28nm CMOS

FW Kuo, R Chen, K Yen, HY Liao… - 2014 Symposium on …, 2014 - ieeexplore.ieee.org
We propose a new architecture of an all-digital PLL (ADPLL) for advanced cellular radios
that is optimized for 28 nm CMOS. It is based on a wide tuning range, fine-resolution class-F …

Cost-efficient, high-volume transmission: Advanced transmission design and architecture of next generation RF modems and front-ends

J Tsutsumi, M Seth, AS Morris III… - IEEE microwave …, 2015 - ieeexplore.ieee.org
Growing demands for higher data rates and the sheer volume of data traffic have been the
main drivers for the evolution of Third-Generation Partnership Project (3GPP) cellular …

Wideband digitally controlled injection-locked oscillator

I Bashir, RB Staszewski - US Patent 10,008,980, 2018 - Google Patents
(57) ABSTRACT A novel and useful digitally controlled injection-locked RF oscillator with an
auxiliary loop. The oscillator is injection locked to a time delayed version of its own …

A hybrid loop two-point modulator without DCO nonlinearity calibration by utilizing 1 bit high-pass modulation

N Xu, W Rhee, Z Wang - IEEE Journal of Solid-State Circuits, 2014 - ieeexplore.ieee.org
This paper presents a two-point modulator architecture which is immune to the nonlinear
effect of the digitally-controlled oscillator (DCO). By utilizing a 1 bit ΔΣ modulation with …