AI accelerator on IBM Telum processor: Industrial product

C Lichtenau, A Buyuktosunoglu, R Bertran… - Proceedings of the 49th …, 2022 - dl.acm.org
IBM Telum is the next generation processor chip for IBM Z and LinuxONE systems. The
Telum design is focused on enterprise class workloads and it achieves over 40% per socket …

Margin elimination through timing error detection in a near-threshold enabled 32-bit microcontroller in 40-nm CMOS

H Reyserhove, W Dehaene - IEEE Journal of Solid-State …, 2018 - ieeexplore.ieee.org
This paper presents a near-threshold operating voltage timing error detecting 32-bit
microcontroller system. The lightweight in situ error detection and correction technique uses …

BlitzCoin: Fully Decentralized hardware power management for accelerator-rich SoCs

M Cochet, K Swaminathan, E Loscalzo… - 2024 ACM/IEEE 51st …, 2024 - ieeexplore.ieee.org
On-chip power-management techniques have evolved over several processor generations.
However, response time and scalability constraints have made it difficult to translate existing …

Energy efficiency boost in the AI-infused POWER10 processor

BW Thompto, DQ Nguyen, JE Moreira… - 2021 ACM/IEEE 48th …, 2021 - ieeexplore.ieee.org
We present the novel micro-architectural features, supported by an innovative and novel pre-
silicon methodology in the design of POWER10. The resulting projected energy efficiency …

Statistical analysis of multicore CPUs operation in scaled voltage conditions

M Kaliorakis, A Chatzidimitriou… - IEEE Computer …, 2018 - ieeexplore.ieee.org
Designers try to reduce the voltage margins of CPU chips to gain energy without sacrificing
reliable operation. Statistical analysis methods are appealing to predict the safe operational …

Droop mitigation using critical-path sensors and an on-chip distributed power supply estimation engine in the z14™ enterprise processor

C Vezyrtzis, T Strach, I Pierce, J Chuang… - … Solid-State Circuits …, 2018 - ieeexplore.ieee.org
Enterprise server processor designs, which operate at extreme high frequencies and power
envelopes, depend critically on power supply noise mitigation techniques. With supply …

Proactive power management in IBM z15

T Webel, PM Lobo, T Strach… - IBM Journal of …, 2020 - ieeexplore.ieee.org
The IBM z15 processor power management enhances several on-chip power management
techniques over z14 processor with a specific focus on reducing response time for voltage …

IBM z14: Processor characterization and power management for high-reliability mainframe systems

C Berry, D Wolpert, C Vezrytzis… - IEEE Journal of Solid …, 2018 - ieeexplore.ieee.org
The IBM z14 is the latest update in the storied history of IBM mainframes. Reliability,
availability, security, and scalability are the foundation of the IBM mainframe line. System …

Cores, cache, content, and characterization: IBM's second generation 14-nm product, z15

D Wolpert, C Berry, B Bell, A Jatkowski… - IEEE Journal of Solid …, 2020 - ieeexplore.ieee.org
The IBM z15 system improves upon the prior-generation z14 design within the same chip
footprint and technology node, while featuring the addition of two cores, 33%/100%/43 …

A Proactive Droop Mitigation Technique Using Dual-Proportional-Derivative Controller Based on Current and Voltage Prediction

K Zhou, W Shan, K Li, Z Chen, H Ge… - IEEE Journal of Solid …, 2024 - ieeexplore.ieee.org
Droop mitigation technology is one of the key requirements of multicore processors to
ensure supply voltage (V) stability under drastic workload variations. A proactive droop …