FPGA HLS today: successes, challenges, and opportunities
The year 2011 marked an important transition for FPGA high-level synthesis (HLS), as it
went from prototyping to deployment. A decade later, in this article, we assess the progress …
went from prototyping to deployment. A decade later, in this article, we assess the progress …
Pushing the level of abstraction of digital system design: A survey on how to program fpgas
Field Programmable Gate Arrays (FPGAs) are spatial architectures with a heterogeneous
reconfigurable fabric. They are state-of-the-art for prototyping, telecommunications …
reconfigurable fabric. They are state-of-the-art for prototyping, telecommunications …
Fast image processing with fully-convolutional networks
We present an approach to accelerating a wide variety of image processing operators. Our
approach uses a fully-convolutional network that is trained on input-output pairs that …
approach uses a fully-convolutional network that is trained on input-output pairs that …
Spatial: A language and compiler for application accelerators
D Koeplinger, M Feldman, R Prabhakar… - Proceedings of the 39th …, 2018 - dl.acm.org
Industry is increasingly turning to reconfigurable architectures like FPGAs and CGRAs for
improved performance and energy efficiency. Unfortunately, adoption of these architectures …
improved performance and energy efficiency. Unfortunately, adoption of these architectures …
Automatically scheduling halide image processing pipelines
RT Mullapudi, A Adams, D Sharlet… - ACM Transactions on …, 2016 - dl.acm.org
The Halide image processing language has proven to be an effective system for authoring
high-performance image processing code. Halide programmers need only provide a high …
high-performance image processing code. Halide programmers need only provide a high …
Programming heterogeneous systems from an image processing DSL
Specialized image processing accelerators are necessary to deliver the performance and
energy efficiency required by important applications in computer vision, computational …
energy efficiency required by important applications in computer vision, computational …
Reconfiguring the imaging pipeline for computer vision
M Buckler, S Jayasuriya… - Proceedings of the IEEE …, 2017 - openaccess.thecvf.com
Advancements in deep learning have ignited an explosion of research on efficient hardware
for embedded computer vision. Hardware vision acceleration, however, does not address …
for embedded computer vision. Hardware vision acceleration, however, does not address …
Predictable accelerator design with time-sensitive affine types
Field-programmable gate arrays (FPGAs) provide an opportunity to co-design applications
with hardware accelerators, yet they remain difficult to program. High-level synthesis (HLS) …
with hardware accelerators, yet they remain difficult to program. High-level synthesis (HLS) …
Euphrates: Algorithm-soc co-design for low-power mobile continuous vision
Continuous computer vision (CV) tasks increasingly rely on convolutional neural networks
(CNN). However, CNNs have massive compute demands that far exceed the performance …
(CNN). However, CNNs have massive compute demands that far exceed the performance …
Programming and synthesis for software-defined FPGA acceleration: status and future prospects
FPGA-based accelerators are increasingly popular across a broad range of applications,
because they offer massive parallelism, high energy efficiency, and great flexibility for …
because they offer massive parallelism, high energy efficiency, and great flexibility for …