Current flattening circuit for protection against power side channel attacks
N Nedovic, SS Kudva - US Patent 11,507,704, 2022 - Google Patents
US11507704B2 - Current flattening circuit for protection against power side channel attacks
- Google Patents US11507704B2 - Current flattening circuit for protection against power side …
- Google Patents US11507704B2 - Current flattening circuit for protection against power side …
Layout Parasitics and Device Parameter Prediction using Graph Neural Networks
H Ren, GF Kokai, T Ku, WJ Turner - US Patent App. 18/295,145, 2023 - Google Patents
US20230237313A1 - Layout Parasitics and Device Parameter Prediction using Graph Neural
Networks - Google Patents US20230237313A1 - Layout Parasitics and Device Parameter …
Networks - Google Patents US20230237313A1 - Layout Parasitics and Device Parameter …
Current flattening circuit for protection against power side channel attacks
N Nedovic, SS Kudva - US Patent 11,687,679, 2023 - Google Patents
US11687679B2 - Current flattening circuit for protection against power side channel attacks -
Google Patents US11687679B2 - Current flattening circuit for protection against power side …
Google Patents US11687679B2 - Current flattening circuit for protection against power side …
Locate neural network performance hot spots
QY Chen, L Cao, FF Li, SU Han - US Patent 11,775,317, 2023 - Google Patents
Embodiments for locating performance hot spots include collecting sample data having
instruction addresses, the sample data being for a neural network model and determining …
instruction addresses, the sample data being for a neural network model and determining …
Hardware and Software Product Development Using Supervised Learning
BS Nataraj, D Shah - US Patent App. 17/509,352, 2022 - Google Patents
A method of electronic hardware development includes training a machine-learning model
to replicate behavior of a hardware system under development, using output of a first model …
to replicate behavior of a hardware system under development, using output of a first model …
Techniques to improve current regulator capability to protect the secured circuit from power side channel attack
This disclosure relates to current flattening circuits for an electrical load. The current
flattening circuits incorporate randomize various parameters to add noise onto the supply …
flattening circuits incorporate randomize various parameters to add noise onto the supply …
Layout parasitics and device parameter prediction using graph neural networks
H Ren, G Kokai, T Ku, WJ Turner - US Patent 11,651,194, 2023 - Google Patents
Previous approaches build estimated layouts of each device and calculate device
geometries accordingly. They also may apply a linear regression model to estimate parasitic …
geometries accordingly. They also may apply a linear regression model to estimate parasitic …