Rethinking software runtimes for disaggregated memory

I Calciu, MT Imran, I Puddu, S Kashyap… - Proceedings of the 26th …, 2021 - dl.acm.org
Disaggregated memory can address resource provisioning inefficiencies in current
datacenters. Multiple software runtimes for disaggregated memory have been proposed in …

NERO: A near high-bandwidth memory stencil accelerator for weather prediction modeling

G Singh, D Diamantopoulos… - … Conference on Field …, 2020 - ieeexplore.ieee.org
Ongoing climate change calls for fast and accurate weather and climate modeling. However,
when solving large-scale weather prediction simulations, state-of-the-art CPU and GPU …

Extrav: boosting graph processing near storage with a coherent accelerator

J Lee, H Kim, S Yoo, K Choi, HP Hofstee… - Proceedings of the …, 2017 - dl.acm.org
In this paper, we propose ExtraV, a framework for near-storage graph processing. It is based
on the novel concept of graph virtualization, which efficiently utilizes a cache-coherent …

Accelerating weather prediction using near-memory reconfigurable fabric

G Singh, D Diamantopoulos, J Gómez-Luna… - ACM Transactions on …, 2022 - dl.acm.org
Ongoing climate change calls for fast and accurate weather and climate modeling. However,
when solving large-scale weather prediction simulations, state-of-the-art CPU and GPU …

Project pberry: Fpga acceleration for remote memory

I Calciu, I Puddu, A Kolli, A Nowatzyk… - Proceedings of the …, 2019 - dl.acm.org
Recent research efforts propose remote memory systems that pool memory from multiple
hosts. These systems rely on the virtual memory subsystem to track application memory …

Formal techniques for effective co-verification of hardware/software co-designs

R Mukherjee, M Purandare, R Polig… - Proceedings of the 54th …, 2017 - dl.acm.org
Verification is indispensable for building reliable of hardware/software co-designs. However,
the scope of formal methods in this domain is limited. This is attributed to the lack of unified …

Using Local Cache Coherence for Disaggregated Memory Systems

I Calciu, MT Imran, I Puddu, S Kashyap… - ACM SIGOPS …, 2023 - dl.acm.org
Disaggregated memory provides many cost savings and resource provisioning benefits for
current datacenters, but software systems enabling disaggregated memory access result in …

Contutto: A novel FPGA-based prototyping platform enabling innovation in the memory subsystem of a server class processor

B Sukhwani, T Roewer, CL Haymes, KH Kim… - Proceedings of the 50th …, 2017 - dl.acm.org
We demonstrate the use of an FPGA as a memory buffer in a POWER8® system, creating a
novel prototyping platform that enables innovation in the memory subsystem of POWER …

CAESAR: Coherence-aided elective and seamless alternative routing via on-chip FPGA

S Roozkhosh, D Hoornaert… - 2022 IEEE Real-Time …, 2022 - ieeexplore.ieee.org
Prompted by the ever-growing demand for high-performance System-on-Chip (SoC) and the
plateauing of CPU frequencies, the SoC design landscape is shifting. In a quest to offer …

NARMADA: Near-memory horizontal diffusion accelerator for scalable stencil computations

G Singh, D Diamantopoulos… - … Conference on Field …, 2019 - ieeexplore.ieee.org
Real-world weather forecasting applications consist of compound stencil kernels that do not
perform well on conventional architectures. This behavior is due to their complex data …